labs
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labs [2018/12/04 14:54] – [Lab 4: Memory Hierarchy (Due: Mon. 03.12)] kimje | labs [2019/12/27 14:33] (current) – external edit 127.0.0.1 | ||
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====== Labs ====== | ====== Labs ====== | ||
- | ===== Lab 1: Data Cache (Due: Fri. 05.10) ===== | + | ===== Lab 1: Caching |
- | * {{lab1.pdf|Handout}} | + | * {{lab1_assignment_2019.pdf|Handout}} |
- | | + | |
- | * [[https:// | + | * [[https:// |
+ | * {{spim_assembler.zip|SPIM Assembler (Zip)}} | ||
- | ===== Lab 2: Control Flow and Branch Prediction File (Due: Sat. 27.10) ===== | + | ===== Lab 2: Memory Hierarchy |
- | * {{lab2.pdf|Handout}} | + | * {{comparch_fall2019_labs_lab2_handout_lab2.pdf|Handout}} |
- | | + | |
- | * [[https:// | + | * [[https:// |
- | ===== Lab 3: Simulating Caches and Branch Prediction | + | ===== Lab 3: Memory Scheduling |
- | * {{lab3_hs18.pdf|Handout}} | + | * {{comparch_fall2019_labs_lab3_handout.pdf|Handout}} |
- | | + | |
- | * [[https:// | + | * [[https:// |
- | ===== Lab 4: Memory Hierarchy | + | ===== Lab 4: Prefetching |
- | + | ||
- | * {{lab4_hs18.pdf|Handout}} | + | * {{CompArchFS19_Lab4_Prefetching_fix.pdf|Handout}} |
- | * [[https:// | + | * [[https:// |
- | * [[https:// | + | |
+ | ===== Lab 5: Multicore and Cache Coherence [BONUS] (Due: Fri. 31.01) ===== | ||
+ | |||
+ | * {{lab5.pdf|Handout}} | ||
+ | * {{lab5-problem.zip|Code (Zip)}} | ||
+ | * [[https:// | ||
- | ===== Lab 5: Multicore and Cache Coherence [BONUS] (Due: Mon. 15.1) ===== | ||
- | * NOTE: This lab is non-compulsory and purely for extra credit. | ||
- | * {{lab5_hs18.pdf|Handout}} | ||
- | * [[https:// | ||
- | * [[https:// |
labs.1543935274.txt.gz · Last modified: 2019/09/10 13:44 (external edit)