tutorials
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==== Verilog Tutorials ==== | ==== Verilog Tutorials ==== | ||
- | Combinational Logic, Hardware Description Lang. & Verilog | + | **Combinational Logic, Hardware Description Lang. & Verilog** |
- | Sequential Logic Design (Verilog tutorial begins on Slide 99) [Taken from Digitaltechnik Spring | + | * 2018 Digital Circuits, Lecture 6 \\ Starts in lecture, slide 60: {{onur-DigitalDesign-2018-lecture6-combinational-logic-HDL-verilog-afterlecture.pdf|(PDF)}} |
+ | * 2019 Digital Circuits, Lecture 7.2 \\ Starts in lecture, slide 9: {{onur-digitaldesign-2019-lecture7.2-hdl-afterlecture.pdf|(PDF)}} {{onur-digitaldesign-2019-lecture7.2-hdl-afterlecture.pptx| (PPT)}} \\ Starts in video 6:41: https:// | ||
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+ | **Sequential Logic Design Using Verilog** | ||
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+ | * 2018 Digital Circuits, Lecture 7 \\ Starts in lecture, slide 99: {{onur-DigitalDesign-2018-lecture7-sequential-logic-afterlecture.pdf|(PDF)}} | ||
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==== Vivado Tutorials ==== | ==== Vivado Tutorials ==== | ||
Basic tutorial for implementing an adder on your FPGA [Taken from Digitaltechnik Spring 2018] \\ {{Digitaltechnik_lab2.pdf|Lab2 Manual}} | Basic tutorial for implementing an adder on your FPGA [Taken from Digitaltechnik Spring 2018] \\ {{Digitaltechnik_lab2.pdf|Lab2 Manual}} |
tutorials.1538254298.txt.gz · Last modified: 2019/09/10 13:44 (external edit)