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Lecture Video Playlist on YouTube

Fall 2021 Lectures & Schedule

Week Date Livestream Lecture Readings Lab HW
W1 30.09
Thu.
Live
L1: Introduction and Basics
(PDF) (PPT)
Required
Mentioned
Lab 1 Out HW 0 Out
01.10
Fri.
Live
L2: Trends, Tradeoffs and Design Fundamentals
(PDF) (PPT)
Required
Mentioned
W2 07.10
Thu.
Live
L3a: Memory Systems: Challenges and Opportunities
(PDF) (PPT)
Described
Suggested
HW 1 Out
L3b: Course Info & Logistics
(PDF) (PPT)
L3c: Memory Performance Attacks
(PDF) (PPT)
Described
Suggested
08.10
Fri.
Live
L4a: Memory Performance Attacks
(PDF) (PPT)
Described
Suggested
Lab 2 Out
L4b: Data Retention and Memory Refresh
(PDF) (PPT)
Described
Suggested
W3 14.10
Thu.
Live
L5: RowHammer & Secure and Reliable Memory
(PDF) (PPT)
Described
Suggested
15.10
Fri.
Live
L6a: RowHammer & Secure and Reliable Memory II
(PDF) (PPT)
Described
Suggested
L6b: Processing using Memory
(PDF) (PPT)
Described
Suggested
W4 21.10
Thu.
Live
L7: Processing using Memory II
(PDF) (PPT)
Described
Suggested
22.10
Fri.
Live
L8: Processing near Memory
(PDF) (PPT)
Described
Suggested
Lab 3 Out
W5 28.10
Thu.
Live
L9a: Real PIM Systems: UPMEM Case Study
(PDF) (PPT)
Described
Suggested
HW 2 Out
L9b: How to Evaluate Data Movement Bottlenecks
(PDF) (PPT)
Described
Suggested
29.10
Fri.
Live
L10: Intelligent Genome Analysis
(PDF) (PPT)
Described
Suggested
W6 04.11
Thu.
Live
L11: Low-Latency Memory
(PDF) (PPT)
Described
Suggested
5.11
Fri.
Live
L12a: Low-Latency Memory II
(PDF) (PPT)
Described
Suggested
L12b: Memory Controllers
(PDF) (PPT)
Described
Suggested
W7 11.11
Thu.
Live
L13: Memory Controllers II: Performance & Service Quality
(PDF) (PPT)
Described
Suggested
Lab 4 Out
12.11
Fri.
Live
L14a: Memory Controllers: Performance & QoS Wrap-Up
(PDF) (PPT)
Described
Suggested
L14b: Emerging Memory Technologies
(PDF) (PPT)
Described
Suggested
HW 3 Out
W8 18.11
Thu.
Live
L15a: Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning
(PDF) (PPT) (Paper)
L15b: Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks
(PDF) (PPT) (Paper)
L15c: CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations
(PDF) (PPT) (Paper)
L15d: QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips
(PDF) (PPT) (Paper)
19.11
Fri.
Live
L16a: Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHammer Patterns, and Implications
(PDF) (PPT) (Paper)
L16b: A Deeper Look into RowHammer’s Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses
(PDF) (PPT) (Paper)
L16c: BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows
(PDF) (PPT) (Paper)
L16d: HARP: Practically and Effectively Identifying Uncorrectable Errors in Memory Chips That Use On-Die Error-Correcting Codes
(PDF) (PPT) (Paper)
W9 22.11
Mon.
Video
D1: Discussion Session 1
(PDF) (PPT)
25.11
Thu.
Live
L17a: Emerging Memory Technologies II
(PDF) (PPT)
Described
Suggested
L17b: Parallelism & Heterogeneity
(PDF) (PPT)
Described
Suggested
26.11
Fri.
Live
L18: Parallelism & Heterogeneity II
(PDF) (PPT)
Described
Suggested
W10 02.12
Thu.
Live
L19a: Multiprocessors
(PDF) (PPT)
Described
Suggested
Lab 5 Out HW 4 Out
L19b: Memory Ordering (Memory Consistency)
(PDF) (PPT)
Described
Suggested
03.12
Fri.
Live
L20: Cache Coherence
(PDF) (PPT)
Described
Suggested
05.12
Sun.
Video
D2: Discussion Session 2
(PDF) (PPT)
HW 5 Out
W11 08.12
Wed.
Live
D3: Discussion Session 3
(PDF) (PPT)
09.12
Thu.
Live
L21: Interconnects
(PDF) (PPT)
Required
Mentioned
10.12
Fri.
Live
L22: On-Chip Networks
(PDF) (PPT)
Described
Suggested
W12 16.12
Thu.
Live
L23: SIMD Processors and GPUs
(PDF) (PPT)
Required
Mentioned
17.12
Fri.
Final Exam
schedule.1639606307.txt.gz · Last modified: 2021/12/15 23:11 by sjoao