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Buzzwords

Buzzwords are terms that are mentioned during the lecture which are particularly important to understand thoroughly. This page tracks the buzzwords for each of the lectures and can be used as a reference for finding gaps in your understanding of course material.

Lecture 1 (29.09 Thu.)

  • Computer Architecture
  • Levels of transformation
  • Algorithm
  • System software
  • Instruction Set Architecture (ISA)
  • Microarchitecture
  • Logic
  • Bioinformatics
  • Hardware security
  • Fault tolerance
  • Hardware-software cooperation
  • Heterogeneous processors
  • Hybrid main memory
  • Redundancy
  • RowHammer
  • You and your research
  • Tensor Processing Units (TPUs)
  • Tesla Dojo Chip & System
  • Cerebras
  • Systems programming
  • Wafer-scale integration
  • Digital design
  • Abstraction layers
  • Processing in memory (PIM)
  • Processing using memory
  • Processing near memory
  • Multi-core systems
  • Accelerating genome analysis
  • Accelerating data structures
  • Mobile workloads
  • Expressive memory interfaces
  • Phase change memory (PCM)
  • UPMEM
  • Function-in-Memory DRAM (FIMDRAM)
  • DAMOV
  • SIMDRAM
  • RowClone
  • Meldown and Spectre
  • High-throughput genome sequencing
  • Design constraints

Lecture 2 (30.09 Fri.)

  • DRAM
  • Memory bottleneck
  • Bandwidth
  • Quality-of-service (QoS)
  • Memory capacity gap
  • DRAM capacity, bandwidth, latency
  • Latency-sensitive workloads
  • Data movement
  • Memory-level parallelism
  • Cache line (or cache block)
  • Pipeline stall
  • DRAM periodic refresh
  • Memory errors
  • Testing infrastructure
  • RowHammer
  • Emerging memory technologies
  • Memory controllers
  • Hybrid/heterogeneous memory
  • Memory interference

Lecture 3 (06.10 Thu.)

  • In-memory Computation/Processing
  • Processing in Memory (PIM)
  • Near-data Processing (NDP)
  • Data movement
  • Maslow's (Human) Hierarchy of Needs
  • Intelligent controllers
  • Processing using Memory
  • Processing near Memory
  • Bulk data copy/initialization
  • In-DRAM row copy
  • RowClone
  • Subarray
  • Banks
  • UPMEM Processing-in-DRAM Engine
  • 3D-stacked memory
  • Gather/Scatter DRAM
  • Bulk data copy and initialization
  • In-Memory copy
  • Intra-subarray
  • Inter-bank
  • Memory as an accelerator
  • Low-cost Inter-linked subarrays (LISA)
  • Fine-Grained In-DRAM Copy (FIGARO)
  • Network-On-Memory
  • Bulk Bitwise in-DRAM Computation (Ambit)
  • Intelligent Memory Device
  • ComputeDRAM
  • Dual Contact Cell
  • SIMDRAM
  • D-RaNGe
  • QUAC-TRNG
  • Pinatubo
  • PiDRAM
  • In-Memory Crossbar
  • Kirchoff's laws
  • Flash-Cosmos
  • pLUTo
  • DR-STRaNGe
  • DRAM Latency PUF
  • Majority function

Lecture 4 (07.10 Fri.)

  • Data Movement
  • Processing in memory (PIM)
  • In-memory computation/processing
  • Near-data processing (NDP)
  • UPMEM Processing-in-DRAM Engine
  • 3D-stacked memory
  • RowClone
  • Gather/Scatter DRAM
  • Bulk data copy and initialization
  • In-Memory copy
  • Intra-subarray
  • Inter-bank
  • Memory as an accelerator
  • Low-cost Inter-linked subarrays (LISA)
  • Fine-Grained In-DRAM Copy (FIGARO)
  • Network-On-Memory
  • Bulk Bitwise in-DRAM Computation (Ambit)
  • Intelligent Memory Device
  • ComputeDRAM
  • Dual Contact Cell
  • New memory technologies

Lecture 5 (13.10 Thu.)

  • Genome analysis
  • DNA
  • Cell information
  • Genetic content
  • Human genome
  • DNA genotypes
  • Personalized Medicine
  • Intelligent Genome Analysis
  • SARS-CoV-2
  • Privacy-Preserving Genome Analysis
  • RNA
  • Nanopore
  • Protein / Phenotypes
  • Adenine (A), Thymine (T), Guanine (G), Cytosine (C)
  • Supercoiled
  • Chromosomes
  • HeLa's cells (Henrietta Lacks)
  • Reference genome
  • Sequence alignment
  • High-throughput sequencing (HTS)
  • Read mapping
  • Indexing
  • Hashing
  • Smith-Waterman
  • Hamming distance
  • Metagenomics Analysis
  • Hash based seed-and-extend
  • K-mers
  • Burrows-Wheeler Transform
  • Ferragina-Manzini Index
  • Edit distance
  • Match / Mismatch
  • Deletion / Insertion / Substitution
  • Dynamic programming
  • MrFAST
  • Verification
  • Seed filtering
  • Needleman-Wunsch
  • Hardware Acceleration for genomic analysis
  • Accelerating Read Mapping
  • Seed Filtering
  • Pre-alignment Filtering
  • Read Alignment Acceleration
  • GRIM-Filter
  • GenASM
  • SneakySnake
  • GateKeeper
  • MAGNET
  • Shouji
  • GateKeeper-GPU
  • SneakySnake
  • FastHash
  • Adjacent k-mers
  • Adjacency filtering
  • Cheap k-mer selection
  • Pre-alignment filtering
  • Hamming distance
  • Shifted Hamming distance
  • FPGA
  • Data movement bottleneck
  • processing-in-memory
  • processing-using-memory
  • processing-near-memory
  • Near-memory Pre-alignment Filtering
  • 3D-Stacked DRAM
  • GenCache
  • AirLift

Lecture 6 (14.10 Fri.)

  • Secure/Reliable/Safe Architectures
  • Redundancy
  • RowHammer
  • Memory Scaling
  • DRAM: Dynamic Random Access Memory
  • Cell-to-cell coupling and interference
  • Google Project Zero
  • Virtual Memory
  • Page table
  • RowHammer Attacks
  • SECDED ECC
  • Potential Solutions
  • Sophisticated ECC
  • PARA: Probabilistic Adjacent Row Activation
  • PARA in Real Systems
  • Intelligent Memory Controllers
  • NAND Flash Infrastructure
  • Many-sided RowHammer Attack
  • TRRespass
  • TRR: Target Row Refresh
  • pTRR: Pseudo TRR
  • TRR Sampler
  • TRR Inhibitor
  • Security by Obscurity
  • Vulnerable Temperature Range
  • Aggressor Row on Time
  • Wordline Voltage
  • RowHammer Solutions

Lecture 7a (20.10 Thu.)

  • DRAM RowHammer
  • First RowHammer Analysis
  • Retrospective on RowHammer & Future
  • Intelligent Memory Controllers
  • Revisiting RowHammer
  • DRAM Infrastructures
  • SoftMC
  • RowHammer Characteristics
  • Temperature
  • Aggressor Row Active Time
  • Victim DRAM Cell's Physical Location
  • Wordline Voltage
  • RowHammer Solutions
  • BlockHammer
  • Scalability
  • Compatibility
  • Self-Managing DRAM (SMD)
  • Byzantine Failures

Lecture 7b (20.10 Thu.)

  • DRAM Cell
  • DRAM Refresh
  • Refresh Overhead
  • Performance
  • Energy
  • Retention Time Profile
  • RAIDR
  • Data Pattern Dependence (DPD)
  • Variable Retention Time (VRT)

Lecture 8a (21.10 Fri.)

  • DRAM Refresh
  • Profiling
  • Binning
  • Refresh
  • Retention time
  • Data pattern
  • Variable time retention
  • Retention failures
  • AVATAR
  • PARBOR
  • REAPER
  • BEER
  • HARP
  • Uncorrectable errors
  • On-die ECC
  • Bloom Filter
  • Refresh-Access Parallelization
  • HiRA

Lecture 8b (21.10 Fri.)

  • Memory Latency
  • Maslow's Hierarchy of Needs
  • Edge Computing
  • Latency variation
  • DDR5
  • 3D-stacked DRAM
  • Runahead execution
  • Sun ROCK
  • Sense Amplifier
  • DRAM Subarray
  • Bulk Bitwise Execution
  • TL-DRAM
  • DRAM Latency (tRC)
  • Near Segment
  • Far Segment
  • Hardware-Managed Cache
  • Inter-Segment Migration

Lecture 9 (27.10 Thu.)

  • TL-DRAM
  • LISA
  • VILLA
  • CROW
  • CLR-DRAM
  • SALP
  • Global Row-buffer
  • Local Row-buffer
  • Timing margins
  • Process variation
  • Worst-case
  • Adaptive-latency
  • DRAM characterization
  • SoftMC
  • Restore time
  • AL-DRAM
  • Latency variation
  • Flexible-Latency DRAM
  • Solar DRAM
  • Physical Unclonable Function (PUF)
  • True Random Number Generator
  • Refresh Latency
  • ChargeCache
  • Vampire DRAM

Lecture 11a (03.11 Thu.)

  • Memory Controller
  • DRAM Latency
  • DRAM Throughput
  • Phase Change Memory
  • Spin-Transfer Torque Magnetic Memory
  • Flash Memory
  • Solid-State Drive (SSD)
  • SSD Controller
  • Error Correction
  • Wear Leveling
  • Garbage Collection
  • Voltage Optimization
  • Page Remapping
  • Read Disturb Errors
  • DRAM Types
  • DDR (Double Data Rate)
  • LPDDR (Low-Power DDR)
  • GDDR (Graphic DDR for High Bandwidth)
  • eDRAM (Enhanced DRAM)
  • RLDRAM (Reduced-Latency DRAM)
  • 3D Stacked DRAM
  • WIO (Wide I/O)
  • HBM (High-Bandwidth Memory)
  • HMC (Hybrid Memory Cube)
  • Ramulator
  • DRAM Controller
  • DRAM Request
  • Request Buffer
  • DRAM Scheduling Policies
  • FCFS (First Come First Served)
  • FR-FCFS (first Ready, First Come First Served)
  • Row Buffer Management Policy
  • Open-Row Policy
  • Closed-Row Policy
  • DRAM Power Management
  • DRAM Timing Constraints
  • DRAM Refresh
  • Quality of Service (QoS)
  • Self-Optimizing DRAM Controller
  • Reinforcement Learning
  • Self-Optimizing Computing Architecture
  • Data-Driven Computing Architecture
  • Intelligent Architecture

Lecture 11b (03.11 Thu.)

  • Target metric
  • Theoretical proof
  • Analytical modeling/estimation
  • Abstraction
  • Prototyping
  • Accuracy
  • Workload
  • RTL simulations
  • Design choices
  • Cycle-level accuracy
  • Design space exploration
  • Flexibility
  • High-level simulations
  • Low-level models
  • Functional Simulation
  • Timing Simulation
  • SimpleScalar Simulator
  • FAST Simulator
  • Trace-driven simulation
  • Execution-driven simulation

Lecture 13a (10.11 Thu.)

  • Non-volatile Memories (NVMs)
  • Persistent Memory
  • The Persistent Memory Manager (PMM)
  • Data Mapping
  • Locality
  • Intel Optane Persistent Memory
  • Crash Consistency
  • Consistency Support
  • ThyNVM
  • Security and Data Privacy
  • Virtual Memory

Lecture 13b (10.11 Thu.)

  • Memory Controllers
  • Performance
  • Service Quality
  • Self-Optimizing DRAM Controller
  • Reinforcement Learning
  • Intelligent Architectures
  • Shared Resources
  • Inter-Thread/Application Interface
  • Uncontrolled Interference
  • Multi-Core Systems
  • Distributed Deny of Service (DoS)
  • Quality-of-System (QoS) Aware Memory Systems
  • Unfairness
  • Stall-Time Fair Memory Scheduler (STFM)
  • Parallelism-Aware Batch Scheduling (PAR-BS)

Lecture 15 (17.11 Thu.)

  • Memory controller
  • Bank-level parallelism
  • Memory Interference
  • Quality of Service
  • QoS-Aware Memory Systems
  • Stall-Time Fair Memory Scheduling
  • Parallelism-Aware Batch Scheduling
  • PAR-BS
  • ATLAS Memory Scheduler
  • Thread Cluster Memory Scheduling
  • TCM
  • Throughput vs. Fairness
  • Clustering Threads
  • STFM
  • FR-FCFS
  • The Blacklisting Memory Scheduler
  • BLISS
  • Staged Memory Scheduling
  • SMS
  • DASH
  • Current SoC Architectures
  • Strong Memory Service Guarantees
  • Predictable Performance
  • Data mapping
  • Memory Channel Partitioning
  • Core/source throttling
  • Fairness via Source Throttling

Lecture 17a (24.11 Thu.)

  • Execution-Based Prefetch
  • Runahead Execution
  • Continuous Runahead
  • Value Prediction
  • Sun ROCK
  • IBM POWER6
  • NVIDIA Denver
  • Multiprocessing

Lecture 20 (02.12 Fri.)

  • Interconnects
  • Cache coherence
  • Interconnect networks:
    • Topology
    • Routing
    • Buffering and flow control
      • Oversubscription of routers
  • Terminology:
    • Network Interface
    • Link
    • Switch/router
    • Channel
    • Node
    • Message
    • Packet
    • Flit
    • Direct/Indirect network
  • Properties of a Network Topology:
    • Regular/Irregular
    • Routing distance
    • Diameter
    • Average distance
    • Bisection Bandwidth
    • Blocking/non-blocking. Rearrangeable non-blocking
  • Topologies:
    • Bus
    • P2P
    • Crossbar
    • Ring
    • Tree
    • Omega
    • Hypercube
    • Mesh
    • Torus
    • Butterfly
  • Cost, latency, contention, energy, bandwidth, overall performance
  • Circuit switching network
  • Multistage network
  • Fetch-and-add
  • Unidirectional Ring
  • Bidirectional rings
  • Hierarchical rings
  • Mesh: asymmetricity on the edge
  • Torus
  • H-tree
  • Fat-tree
  • Hyper-cube. Cosmic Cube
  • Routing mechanism: Arithmetic, Source-based, Table-based lookup
  • Types of routing algorithm: deterministic, oblivious, adaptive
  • Deadlock
  • Oblivious routing
  • Adaptive Routing: minimal adaptive, non-minimal adaptive
  • Flow Control
  • Handling contention: buffer, drop or misroute
  • Flow control methods:
    • Circuit switching
    • Bufferless
    • Store and forward
    • Virtual cut through
    • Wormhole
  • Performance and congestion at high loads
  • Store-and-forward
  • Cut-though flow control
  • Wormhole flow control
  • Head of Line Blocking
  • Virtual Channel Flow Control
buzzword.txt · Last modified: 2022/12/02 23:29 by amangli