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Seminar on Computer Architecture - Fall 2018
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readings
Table of Contents
Readings
Lecture 1 (19.09 Wed.)
Lecture 2 (26.09 Wed.)
Readings
Lecture 1 (19.09 Wed.)
Suggested (lecture 1):
G.E. Moore, "Cramming more components onto integrated circuits," Electronics magazine, 1965
T.S. Kuhn, "The Structure of Scientific Revolutions," 1962
R. Jain, "The Art of Computer Systems Performance Analysis," 1991
S.P. Muralidhara, L. Subramanian, O. Mutlu, M. Kandemir, T. Moscibroda, "Reducing Memory Interference in Multicore Systems via Application-Aware Memory Channel Partitioning," MICRO 2011
Lecture 2 (26.09 Wed.)
Suggested (lecture 2):
V. Seshadri, D. Lee, T. Mullins, H. Hassan, A. Boroumand, J. Kim, M.A. Kozuch, O. Mutlu, P.B. Gibbons, T.C. Mowry, “Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology,” MICRO 2017
K. Chang, P. Nair, S. Ghose, D. Lee, M. Qureshi, O. Mutlu, “Low-Cost Inter-Linked Subarrays (LISA): Enabling Fast Inter-Subarray Data Movement in DRAM,” HPCA 2016
V. Seshadri, Y. Kim, C. Fallin, D. Lee, R. Ausavarungnirun, G. Pekhimenko, Y. Luo, O. Mutlu, M.A. Kozuch, P.B. Gibbons, T.C. Mowry, "RowClone: Fast and Energy-Efficient In-DRAM Bulk Data Copy and Initialization," MICRO 2013
O. Mutlu and T. Moscibroda, "Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems,” ISCA 2008.
O. Mutlu and T. Moscibroda, "Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors," MICRO 2007
readings.txt
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