User Tools

Site Tools


schedule

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision
Previous revision
schedule [2018/12/19 17:01]
juang [2018 Lectures/Schedule]
schedule [2019/02/12 17:35] (current)
Line 32: Line 32:
 | ::: | ::: | <hi #​fff200>​S9. 2. {{clkscrew.pdf|CLKSCREW:​ Exposing the Perils of Security-Oblivious Energy Management,​}} USENIX SECURITY 2017.</​hi>​ \\ {{CLKSCREW_DominicWeibel.pptx|(PPT)}} {{CLKSCREW_DominicWeibel.pdf|(PDF)}}| ​ | | | ::: | ::: | <hi #​fff200>​S9. 2. {{clkscrew.pdf|CLKSCREW:​ Exposing the Perils of Security-Oblivious Energy Management,​}} USENIX SECURITY 2017.</​hi>​ \\ {{CLKSCREW_DominicWeibel.pptx|(PPT)}} {{CLKSCREW_DominicWeibel.pdf|(PDF)}}| ​ | |
 | ::: | ::: | <hi #​fff200>​S9. 3. {{https://​people.inf.ethz.ch/​omutlu/​pub/​X-MEM_Expressive-Memory-for-Rich-Cross-Layer-Abstractions_isca18.pdf|A Case for Richer Cross-layer Abstractions:​ Bridging the Semantic Gap with Expressive Memory,}} ISCA 2018.</​hi>​ \\ {{Voinov_Xmem_2018.pptx|(PPT)}} {{Voinov_Xmem_2018.pdf|(PDF)}}| ​ | | | ::: | ::: | <hi #​fff200>​S9. 3. {{https://​people.inf.ethz.ch/​omutlu/​pub/​X-MEM_Expressive-Memory-for-Rich-Cross-Layer-Abstractions_isca18.pdf|A Case for Richer Cross-layer Abstractions:​ Bridging the Semantic Gap with Expressive Memory,}} ISCA 2018.</​hi>​ \\ {{Voinov_Xmem_2018.pptx|(PPT)}} {{Voinov_Xmem_2018.pdf|(PDF)}}| ​ | |
-| @#​CEECF5:​W14 | @#​CEECF5:​19.12 \\ Wed. | @#​CEECF5:<​hi #​fff200>​S10. 1. {{https://​people.inf.ethz.ch/​omutlu/​pub/​acs_asplos09.pdf|Accelerating Critical Section Execution with Asymmetric Multi-Core Architectures,​}} ASPLOS 2009.</​hi>​ \\ {{|(PPT)}} {{|(PDF)}} | @#CEECF5: | @#​CEECF5:​| +| @#​CEECF5:​W14 | @#​CEECF5:​19.12 \\ Wed. | @#​CEECF5:<​hi #​fff200>​S10. 1. {{https://​people.inf.ethz.ch/​omutlu/​pub/​acs_asplos09.pdf|Accelerating Critical Section Execution with Asymmetric Multi-Core Architectures,​}} ASPLOS 2009.</​hi>​ \\ {{ACS.pptx|(PPT)}} {{ACS.pdf|(PDF)}} | @#CEECF5: | @#​CEECF5:​| 
-| ::: | ::: | @#​CEECF5:<​hi #​fff200>​S10. 2. {{https://​people.inf.ethz.ch/​omutlu/​pub/​pcm_isca09.pdff|Architecting Phase Change Memory as a Scalable DRAM Alternative,​}} ISCA 2009.</​hi>​ \\ {{Bachelor-Seminar-Dec-19-Koppula-PCM-Memory.pdf|(PDF)}} | @#CEECF5: | @#CEECF5:|+| ::: | ::: | @#​CEECF5:<​hi #​fff200>​S10. 2. {{https://​people.inf.ethz.ch/​omutlu/​pub/​pcm_isca09.pdf|Architecting Phase Change Memory as a Scalable DRAM Alternative,​}} ISCA 2009.</​hi>​ \\ {{Bachelor-Seminar-Dec-19-Koppula-PCM-Memory.pptx|(PPT)}} ​{{Bachelor-Seminar-Dec-19-Koppula-PCM-Memory.pdf|(PDF)}} | @#CEECF5: | @#CEECF5:|
schedule.1545235269.txt.gz · Last modified: 2019/02/12 17:35 (external edit)