Seminar in Computer Architecture - Fall 2020

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readings [2020/11/18 17:21] – [Lecture 9 (12.11 Thu.)] yaglikcareadings [2020/12/10 23:46] – Add readings, Lecture 12 (03.12 Thu.) sjoao
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     * {{https://www.usenix.org/system/files/conference/usenixsecurity16/sec16_paper_razavi.pdf|K. Razavi et al., “Flip Feng Shui: Hammering a Needle in the SoftwareStack,” in USENIX Security, 2016}}     * {{https://www.usenix.org/system/files/conference/usenixsecurity16/sec16_paper_razavi.pdf|K. Razavi et al., “Flip Feng Shui: Hammering a Needle in the SoftwareStack,” in USENIX Security, 2016}}
     * {{khan2018analysis.pdf|Mohammad Khan and Swaroop Ghosh. "Analysis of Row Hammer Attack on STTRAM," in ICCD, 2018.}}     * {{khan2018analysis.pdf|Mohammad Khan and Swaroop Ghosh. "Analysis of Row Hammer Attack on STTRAM," in ICCD, 2018.}}
 +
 +===== Lecture 10 (19.11 Thu.) =====
 +=== Suggested (lecture 10.a): ===
 +  * {{dpuf_sutar.pdf|S. Sutar, A. Raha, D. Kulkarni, R. Shorey, J. Tew, and V. Raghunathan, “D-PUF: An Intrinsically Reconfigurable DRAM PUF for Device Authentication and Random Number Generation,” TECS, 2018.}}
 +  * {{deterministic_encryption.pdf|M. Bellare, R. Dowsley, and S. Keelveedhi, "How Secure is Deterministic Encryption?" IACR International Workshop on Public Key Cryptography, 2015.}}
 +  * {{tehranipoor_robust_TRNG.pdf|F. Tehranipoor, W. Yan, and J. A. Chandy, “Robust Hardware True Random Number Generators using DRAM Remanence Effects,” HOST, 2016.}}
 +  * {{keller_trng.pdf|C. Keller, F. Gurkaynak, H. Kaeslin, and N. Felber, “Dynamic Memory-based
 +Physically Unclonable Function for the Generation of Unique Identifiers and
 +True Random Numbers,” ISCAS, 2014.}}
 +
 +=== Suggested (lecture 10.b): ===
 +  * {{https://people.inf.ethz.ch/omutlu/pub/rowclone_micro13.pdf| V. Seshadri, Y. Kim, C. Fallin, D. Lee, R. Ausavarungnirun, G. Pekhimenko, Y. Luo, O. Mutlu, M.A. Kozuch, P.B. Gibbons, T.C. Mowry, "RowClone: Fast and Energy-Efficient In-DRAM Bulk Data Copy and Initialization," MICRO, 2013.}}
 +  * {{https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17.pdf| V. Seshadri, D. Lee, T. Mullins, H. Hassan, A. Boroumand, J. Kim, M.A. Kozuch, O. Mutlu, P.B. Gibbons, T.C. Mowry, “Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology,” MICRO, 2017.}}
 +  * {{https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18.pdf| A. Boroumand, S. Ghose, Y. Kim, R. Ausavarungnirun, E. Shiu, R. Thakur, D. Kim, A. Kuusela, A. Knies, P. Ranganathan, and O. Mutlu, "Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks,” ASPLOS, 2018.}}
 +  * {{https://people.inf.ethz.ch/omutlu/pub/processing-in-memory_workload-driven-perspective_IBMjrd19.pdf|S. Ghose, A. Boroumand, J. S. Kim, J. Gomez-Luna, and O. Mutlu, "Processing-in-Memory: A Workload-Driven Perspective," IBM Journal of Research & Development, 2019}} 
 +  * {{https://people.inf.ethz.ch/omutlu/pub/softMC_hpca17.pdf|H. Hassan, N. Vijaykumar, S. Khan, S. Ghose, K. Chang, G. Pekhimenko, D. Lee, O. Ergin, O. Mutlu, "SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies," HPCA 2017}}
 +  * {{https://users.ece.cmu.edu/~omutlu/pub/lisa-dram_hpca16.pdf|K. K. Chang, P. J. Nair, S. Ghose, D. Lee, M. K. Qureshi, O. Mutlu, "Low-Cost Inter-Linked Subarrays (LISA): Enabling Fast Inter-Subarray Data Movement in DRAM," HPCA 2016}}
 +  * {{dac19-aligns.pdf|S. Angizi, J. Sun, W. Zhang, D. Fan, "AlignS: A processing-in-memory accelerator for DNA short read alignment leveraging SOT-MRAM," DAC 2019}}
 +  * {{isca19-duality.pdf|D. Fujiki, S. Mahlke, R. Das, "Duality cache for data parallel acceleration," ISCA 2019}}
 +  * {{https://people.inf.ethz.ch/omutlu/pub/salp-dram_isca12.pdf| Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, and Onur Mutlu, "A Case for Exploiting Subarray-Level Parallelism (SALP) in DRAM," ISCA 2012}}
 +  * {{micro17-drisa.pdf| S. Li, D. Niu, K.T. Malladi, H. Zheng, B. Brennan, Y. Xie, "Drisa: A dram-based reconfigurable in-situ accelerator," MICRO 2017}}
 +  * {{dac18-dracc.pdf| Q. Deng, L. Jiang, Y. Zhang, M. Zhang, J. Yang, "DrAcc: a DRAM based accelerator for accurate CNN inference," DAC 2018}}
 +
 +
 +===== Lecture 12 (03.12 Thu.) =====
 +=== Suggested (lecture 12.a): ===
 +  * {{https://people.inf.ethz.ch/omutlu/pub/dram-row-hammer_isca14.pdf|Y. Kim, R. Daly, J. Kim, C. Fallin, J.H. Lee, D. Lee, C. Wilkerson, K. Lai, O. Mutlu, "Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors," ISCA 2014}}
 +  * {{https://arxiv.org/pdf/1904.09724.pdf|O. Mutlu, J. S. Kim, RowHammer: A Retrospective," arXiv, 2019}}
 +  * {{https://people.inf.ethz.ch/omutlu/pub/Revisiting-RowHammer_isca20.pdf|Jeremie S. Kim, Minesh Patel, A. Giray Yaglikci, Hasan Hassan,Roknoddin Azizi, Lois Orosa, and Onur Mutlu,"Revisiting RowHammer: An Experimental Analysis of Modern Devices and Mitigation Techniques", ISCA, 2020.}}
 +  * {{https://people.inf.ethz.ch/omutlu/pub/rowhammer-TRRespass_ieee_security_privacy20.pdf | Pietro Frigo, Emanuele Vannacci, Hasan Hassan, Victor van der Veen, Onur Mutlu, Cristiano Giuffrida, Herbert Bos, and Kaveh Razavi, "TRRespass: Exploiting the Many Sides of Target Row Refresh", Proceedings of the 41st IEEE Symposium on Security and. Privacy (S&P), 2020}}
 +  * {{https://people.inf.ethz.ch/omutlu/pub/raidr-dram-refresh_isca12.pdf | J. Liu, B. Jaiyen, R. Veras, and O. Mutlu. "RAIDR: Retention-aware intelligent DRAM refresh.", in ACM SIGARCH, 2012}}
 +  * {{https://download.vusec.net/papers/eccploit_sp19.pdf|L. Cojocaret al., “Exploiting Correcting Codes: On the Effectiveness of ECC Memory Against Rowhammer Attacks,” in S&P, 2019}}
 +  * {{https://www.blackhat.com/docs/us-15/materials/us-15-Seaborn-Exploiting-The-DRAM-Rowhammer-Bug-To-Gain-Kernel-Privileges.pdf|M. Seaborn and T. Dullien, “Exploiting the DRAM Rowhammer Bug to Gain Kernel Privileges,” in Black Hat 
 +USA, 2015}}
 +  * {{https://gruss.cc/files/flipinthewall.pdf|D. Gruss et al., “Another Flip in the Wall of Rowhammer Defenses,” in IEEE S&P, 2018}}
 +
 +=== Suggested (lecture 12.b): ===
 +  * {{ https://www.usenix.org/legacy/events/leet08/tech/full_papers/king/king.pdf | S. T. King, et al. “Designing and implementing malicious hardware”, in LEET 2008 }}
 +  * {{ liu2013.pdf | Yu Liu, Yier Jin and Yiorgos Makris. "Hardware Trojans in Wireless Cryptographic ICs: Silicon Demonstration & Detection Method Evaluation", in ICCAD 2013 }}
 +  * {{ trippel2020.pdf | Trippel, T., Shin, K.G., Bush, K.B. and Hicks, M., 2020, May. "ICAS: an Extensible Framework for Estimating the Susceptibility of IC Layouts to Additive Trojans", in IEEE SP, 2020}}
 +  * {{ https://arxiv.org/pdf/1906.08842 | Trippel, Timothy, Kang G. Shin, Kevin B. Bush, and Matthew Hicks. "T-TER: Defeating A2 Trojans with Targeted Tamper-Evident Routing", arXiv preprint, 2019}}
 +
readings.txt · Last modified: 2020/12/11 08:37 by alserm