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Course Logistics and Presentation Preparation

Please check the paper assignment below and remember the presentation date. Please start preparing to present your assigned paper.

Each student will present and analyze one paper (maximum 30 minutes) and lead discussion+brainstorming+feedback (maximum 20 minutes).

Please use the following algorithm to preapre for your talk:

  • Step 2: Check your assigned paper and presentation date.
  • Step 3: Contact your Mentor #1 and Mentor #2 to schedule a meeting (do it now).
  • Step 4: Read and analyze your paper thoroughly.
  • Step 5: Discuss with anyone you wish + use any resources.
  • Step 6: Prepare a draft presentation based on guidelines (Study Lecture 1 and 2 again for presentation guidelines).
  • Step 7: Meet mentors and get feedback. Meetings are mandatory – you have to schedule them with your assigned mentors.
  • Step 8: Revise the presentation and delivery.
  • Step 9: Meet mentors again and get further feedback.
  • Step 10: Revise the presentation and delivery.
  • Step 11: Practice, practice, practice.

We look forward to you participating in an enjoyable seminar course this semester.

Schedule of Paper Presentations

Last Name First Name Paper Mentor #1 Mentor #2 Session (Order in Day) Date
Herting Moritz Architecting Phase Change Memory as a Scalable DRAM Alternative , ISCA 2009. Hasan Hassan Rahul Bera S1.1 March 19
Heidari Amirhossein Architecting Waferscale Processors - A GPU Case Study, HPCA 2019. Jawad Haj-Yahya Juan Gomez Luna S1.2 March 19
Eppensteiner Patrick ComputeDRAM: In-Memory Compute Using Off-the-Shelf DRAMs, MICRO 2019. Juan Gomez Luna Geraldo De Oliveira Junior S2.1 March 26
Le Sellier de Chezelles Gauthier The Case for a Single-Chip Multiprocessor , ASPLOS 1996. Rahul Bera Jawad Haj-Yahya S2.2 March 26
Ilies Andra-Maria Lest we remember: cold-boot attacks on encryption keys , 17th USENIX Security Symposium 2008. Juan Gomez Luna Can Firtina S3.1 April 2
Störzbach Pascal Memory Hierarchy for Web Search , HPCA 2018. Lois Orosa Nika Mansouri Ghiasi S4.1 April 9
Wüthrich Fabian Rethinking the Memory Hierarchy for Modern Languages, MICRO 2018. Jisung Park Hasan Hassan S4.2 April 9
Brodmann Philipp Transactional Memory: Architectural Support for Lock-Free Data Structures , ISCA 1993. Minesh Patel Giray Yaglikci S5.1 April 23
Mackinga Torgin Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution , MICRO 2001. Nika Mansouri Ghiasi Minesh Patel S5.2 April 23
Pham Huu Tuan SMASH: Co-designing Software Compression and Hardware-Accelerated Indexing for Efficient Sparse Matrix Operations, MICRO 2019. Konstantinos Kanellopoulos Mohammed Alser S6.1 April 30
Mazenauer Philippe Plasticine: A Reconfigurable Architecture For Parallel Patterns, ISCA 2017. Can Firtina Jisung Park S6.2 April 30
Li Yan Deep Compression: Compressing Deep Neural Network with Pruning, Trained Quantization and Huffman Coding , ArXiv 2016. Giray Yaglikci Konstantinos Kanellopoulos S7.1 May 7
Richter Nina EDEN: Enabling Energy-Efficient, High-Performance Deep Neural Network Inference Using Approximate DRAM, MICRO 2019. Mohammed Alser Lois Orosa S7.2 May 7
Brunner Pascal Spectre Attacks: Exploiting Speculative Execution , IEEE Symposium on Security and Privacy 2019. Jisung Park Giray Yaglikci S8.1 May 14
Stöger Felix A2: Analog malicious hardware , IEEE Symposium on Security and Privacy 2016. Hasan Hassan Konstantinos Kanellopoulos S8.2 May 14
Bernegger Boris The Dirty-Block Index, ISCA 2014. Jawad Haj-Yahya Rahul Bera S9.1 May 28
Thommen Kevin Drammer: Deterministic Rowhammer Attacks on Mobile Platforms , CCS 2016. Lois Orosa Nika Mansouri Ghiasi S9.2 May 28
sessions.1585237108.txt.gz · Last modified: 2020/09/10 13:46 (external edit)