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buzzwords [2021/09/20 12:08]
alserm
buzzwords [2021/11/12 09:44] (current)
nalserr [Session 2 (11.11 Thu.)]
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   * Design constrains   * Design constrains
  
 +===== Lecture 2 (30.9 Thu.) =====
 +  *Bioinformatics
 +  *Genome Analysis
 +  *DNA Testing
 +  *Chromosomes
 +  *SNPs
 +  *Personalized Medicine
 +  *Phenotypes
 +  *Privacy-Preserving Genome Analysis
 +  *SARS-CoV-2
 +  *Microbiome Profiling
 +  *High-Throughput Sequencers
 +  *Genome Sequencing
 +  *PacBio
 +  *DNA
 +  *Reference Genome
 +  *Metagenomics
 +  *Read Mapping
 +  *Hashing
 +  *Seeds
 +  *Read Alignment
 +  *Smith-Waterman
 +  *Hamming distance
 +  *Accelerating Read Mapping
 +  *Seed Filtering
 +  *Pre-alignment Filtering
 +  *Read Alignment Acceleration
 +  *FastHASH
 +  *Cheap K-mer Selection
 +  *GateKeeper
 +  *Shifted Hamming Distance
 +  *FPGA
 +  *Shouji
 +  *SneakySnake
 +  *Hybrid Memory Cube
 +  *Ambit
 +  *RowClone
 +  *Pinatubo
 +  *Tesseract
 +  *GRIM-Filter
 +  *GenCache
 +  *Darwin
 +  *GenASM
 +  *AirLift
 +  *UPMEM
 +
 +===== Lecture 3 (07.10 Thu.) =====
 +  *Data Movement
 +  *Processing in memory (PIM)
 +  *In-memory computation/​processing
 +  *Near-data processing (NDP)
 +  *UPMEM Processing-in-DRAM Engine ​
 +  *3D-stacked memory
 +  *RowClone
 +  *Gather/​Scatter DRAM
 +  *Bulk data copy and initialization
 +  *In-Memory copy
 +  *Intra-subarray
 +  *Inter-bank
 +  *Memory as an accelerator
 +  *Low-cost Inter-linked subarrays (LISA)
 +  *Fine-Grained In-DRAM Copy (FIGARO)
 +  *Network-On-Memory
 +  *Bulk Bitwise in-DRAM Computation (Ambit)
 +  *Intelligent Memory Device
 +  *ComputeDRAM
 +  *Dual Contact Cell
 +  *New memory technologies
 +
 +===== Session 2 (11.11 Thu.) =====
 +=== Session 2.1 ===
 +  * Profiling
 +  * Warehouse-scale Computer (WSCs)
 +  * Microarchitectural Bottlenecks ​
 +  * software/​system Design
 +  * Datacenter
 +  * Google-Wide-Profiling (GWP)
 +  * Performance Monitoring Unit (PMU)
 +  * Datacenter Tax
 +  * Retiring
 +  * Bad Speculation
 +  * Front-end Bound
 +  * Back-end Bound
 +  * Memory Hierarchy
 +  * Instruction Cache
 +  * Data Cache
 +  * Instruction Level Parallelism (ILP)
 +  * Memory Bandwidth
 +  * Simultaneous Multi-Threading (SMT)
 +=== Session 2.2 ===
 +  * Inefficiency
 +  * General-Purpose Chips
 +  * Processor Pipeline
 +  * Single Instruction Multiple Data (SIMD)
 +  * Very Long Instruction Word (VLIW)
 +  * H.264 Algorithm
 +  * Memory-Bound
 +  * Magic Instructions
buzzwords.1632132531.txt.gz ยท Last modified: 2021/09/20 12:08 by alserm