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papers [2019/02/28 16:34] alserm |
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| * {{https://people.inf.ethz.ch/omutlu/pub/rlmc_isca08.pdf|Self Optimizing Memory Controllers: A Reinforcement Learning Approach}}, ISCA 2008. | * {{https://people.inf.ethz.ch/omutlu/pub/rlmc_isca08.pdf|Self Optimizing Memory Controllers: A Reinforcement Learning Approach}}, ISCA 2008. | ||
| * {{ https://ieeexplore.ieee.org/iel5/6210/16584/00765950.pdf | Simultaneous Subordinate Microthreading (SSMT)}}, ISCA 1999. | * {{ https://ieeexplore.ieee.org/iel5/6210/16584/00765950.pdf | Simultaneous Subordinate Microthreading (SSMT)}}, ISCA 1999. | ||
| - | * {{spectre_attacks.pdf|Spectre Attacks: Exploiting Speculative Execution}}, arxiv.org 2017. | + | * {{https://spectreattack.com/spectre.pdf|Spectre Attacks: Exploiting Speculative Execution}}, SP 2019. |
| * {{p294-rajwar.pdf|Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution}}, MICRO 2001. | * {{p294-rajwar.pdf|Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution}}, MICRO 2001. | ||
| * {{single_chip_multiprocessor.pdf|The Case for a Single-Chip Multiprocessor}}, ASPLOS 1996. | * {{single_chip_multiprocessor.pdf|The Case for a Single-Chip Multiprocessor}}, ASPLOS 1996. | ||
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