Congratulations to Hasan Hassan on his EDAA Outstanding Dissertation Award 2023

We’d like to congratulate Hasan Hassan on receiving the EDAA Outstanding Dissertation Award 2023 for his dissertation “Improving DRAM Performance, Reliability, and Security by Rigorously Understanding Intrinsic DRAM operations”.  His thesis won the award for “New directions in safety, reliability, security-aware hardware design, validation and testing”.  The award was given at the DATE 2023 conference on April 18 2023.

Thesis overview: 

In his dissertation, Hasan 1) developed novel testing infrastructures and methodologies to rigorously understand intrinsic operational principles of modern DRAM chips and 2) based on such understanding designed new mechanisms to improve memory performance, reliability, and security. DRAM is the dominant main memory technology used in almost all computers today and it is already a performance, energy, reliability, and security bottleneck in many applications and use cases. As such, DRAM performance, reliability, and security are critical problems in modern and future computing systems. These problems are increasingly important as we scale the process technology node into ever smaller feature sizes and as applications become increasingly data intensive and as attackers become increasingly sophisticated. Hasan Hassan’s thesis provides precious experimental data and rigorous analyses on key issues affecting DRAM security, reliability and latency and goes on to make use of the data and the analyses to develop important novel techniques to improve DRAM chips and systems that use DRAM chips. As such, it provides a rigorous, comprehensive, and insightful analysis of major problems in modern DRAM chips (e.g., the RowHammer vulnerability, data retention issues, long latency) and novel solutions to solve such problems.

In particular, Hasan’s dissertation makes four high-level major contributions:

1. It is the first work to introduce a flexible and open-source infrastructure, SoftMC, for testing and analyzing the operational behavior of modern DRAM chips. SoftMC, and its very recent successor DRAM Bender, is the only such infrastructure. Both academia and industry have used SoftMC to discover/analyze new problems (e.g., reliability & security problems, analog computation capability) and analyze important characteristics (e.g., power & energy consumption, latency) in DRAM chips. SoftMC enabled multiple works (Hasan’s Uncovering-TRR work along with the TRRespass [IEEE S&P 2020] and Revisiting RowHammer [ISCA 2020] works Hasan greatly contributed to), whose results strongly motivated industry to take action to solve the RowHammer vulnerability that is plaguing modern DRAM chips. As a result of the analyses enabled by SoftMC, industry is taking a much more serious look at mitigating the RowHammer problem and a major RowHammer task group was (re)organized in JEDEC (Joint Electron Device Engineering Council).

2. It is the first work to methodically understand the internal RowHammer mitigation mechanisms (broadly called Target Row Refresh) implemented in modern DRAM chips and use this understanding to argue for a much more rigorous approach to eliminate the RowHammer security vulnerability in DRAM chips. Hasan’s dissertation shows that a rigorous methodical understanding of in-DRAM TRR mechanisms (called Uncovering TRR, or U-TRR) enables an attacker to completely bypass such mitigations in all 45 tested DRAM modules even in the presence of strong errorcorrecting codes. As mentioned, this analysis, along with analysis from TRRespass and Revisiting RowHammer, which Hasan significantly contributed to, has led industry to take more serious action in RowHammer mitigation.

3. It is the first work to develop a simple and low-cost DRAM interface to enable maintenance operations (like refresh, RowHammer protection, and error scrubbing) to be performed very efficiently and autonomously by the DRAM chip. This technique, called Self-Managing DRAM, enables easier adoption of changes to DRAM maintenance operations as new ideas now do not require changes to the memory controller or the DRAM interface. Self-Managing DRAM leads to more efficient, high performance and more robust/secure DRAM designs that are completely secure against RowHammer and efficient in terms of refresh and error scrubbing.

4. It is the first work to show that, with small modifications to DRAM chips, spare rows in DRAM can be used as copy rows, to improve DRAM latency, energy, and security, all at the same time. This substrate, called CROW (Copy Row DRAM), enables a flexible DRAM chip that can be customized in the field to improve various metrics and protect against RowHammer.

Hasan’s thesis brings together an impressive combination of experimental data, rigorous analyses, and novel techniques to the topic of secure, reliable, and high-performance memory systems, in particular, DRAM systems.  It provides insightful analysis of major problems in modern DRAM chips (e.g., the RowHammer vulnerability, data retention issues, long latency) and novel solutions to solve such problems. His thesis works have also had strong industrial impact, especially his work on SoftMC and U-TRR.  It is expected that many more works will build on Hasan’s thesis directly (using his results and tools) and indirectly.  His Self-Managing DRAM work and the CROW work (which provide new DRAM interfaces and designs) are likely to influence future DRAM standards since they provide low-cost and principled solutions to multiple big problems (RowHammer, data retention, errors, latency) that critically affect DRAM technology and these issues are expected to become worse in future systems.

We’d like to congratulate Hasan once again for all his achievements during his PhD.  Hasan started a new position with Rivos Inc. in October 2022, and we wish him all the best going forward and have no doubt his thesis work will continue to have a long lasting impact into the future.

Hasan Hassan, (defended 29 September 2022)
Thesis title: “Improving DRAM Performance, Reliability, and Security by Rigorously Understanding Intrinsic DRAM Operation”
[Slides (pptx) (pdf)]
[Thesis arXiv (abs) (pdf)]
[SAFARI Live Seminar Video]

Supervisor: Prof. Onur Mutlu
Other thesis evaluation committee members: Prof. Derek Chiou (University of Texas at Austin & Microsoft), Prof. Mattan Erez (University of Texas at Austin), Dr. Mike O’Connor (NVIDIA Research), Prof. Moinuddin Qureshi (Georgia Institute of Technology), Dr. Christian Weis (TU Kaiserslautern)