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Digital Design and Computer Architecture - Spring 2021
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Computer Architecture (CMU) SS15: Lecture Videos
Computer Architecture (CMU) SS15: Course Website
Digitaltechnik SS18: Lecture Videos
Digitaltechnik SS18: Course Website
Digitaltechnik SS19: Lecture Videos
Digitaltechnik SS19: Course Website
Digitaltechnik SS20: Lecture Videos
Digitaltechnik SS20: Course Website
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homeworks
Homework
Homework 1: DRAM Refresh and Combinational Logic (05.03 Fri.)
HW1 handout
HW1 solution
Homework 2: Sequential Logic and Verilog (16.03 Fri.)
HW2 handout
HW2 solutions
Homework 3: Microarch., ISA, and Perf. Evaluation (15.04 Thu.)
HW3 handout
HW3 solutions
Homework 4: Pipelining, Tomasulo’s Algorithm, and Out-of-Order Execution (04.05 Tue.)
HW4 handout
HW4 solutions
Homework 5: Branch Prediction, VLIW, and Systolic Arrays (19.05 Wed.)
HW5 handout
HW5 solutions
Homework 6: Vector Processors and GPUs (31.05 Sun.)
HW6 handout
HW6 solutions
Homework 7: Memory Hierarchy, Caches, Prefetching, and Virtual Memory (12.06 Sat.)
HW7 handout
HW7 solutions
homeworks.txt
· Last modified: 2021/06/22 22:22 by
kimje
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