User Tools

Site Tools


labs

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision
Previous revision
labs [2021/03/03 16:32]
hhasan
labs [2021/05/17 20:14] (current)
gagsingh
Line 10: Line 10:
  
 ^ Lab ^ Tuesday ^ Wednesday ^ Friday (2 sessions) ^ Manual, Report and Files ^ Slides ^ Deadline (Lab Report) ^ ^ Lab ^ Tuesday ^ Wednesday ^ Friday (2 sessions) ^ Manual, Report and Files ^ Slides ^ Deadline (Lab Report) ^
-| Lab 1: Drawing a Basic Circuit |09.03.|09.03.|12.03.|{{.pdf|Lab1 Manual}} \\ {{.pdf|Lab1 Report (PDF)}} \\ {{.docx|Lab1 Report (DOC)}}|{{.pdf|Lab1 Supplement (PDF)}} \\ {{.pptx|Lab1 Supplement (PPT)}}|26.03.+| Lab 1: Drawing a Basic Circuit |09.03|10.03|12.03|{{digitaldesign-s21-lab1_manual.pdf|Lab1 Manual}} \\ {{digitaldesign-s21-lab1_report.pdf|Lab1 Report (PDF)}} \\ {{digitaldesign-s21-lab1_report.docx|Lab1 Report (DOC)}}|{{digitaldesign-s21-lab1_supplement_beforelab.pdf|Lab1 Supplement (PDF)}} \\ {{digitaldesign-s21-lab1_supplement_beforelab.pptx|Lab1 Supplement (PPT)}}|26.03| 
-| Lab 2: Mapping Your Circuit to FPGA |16.03.|16.03.|19.03.| | |02.04.+| Lab 2: Mapping Your Circuit to FPGA |16.03|17.03|19.03| {{lab2_manual.pdf|Lab2 Manual}} \\ {{lab2_report.pdf|Lab2 Report (PDF)}} \\ {{lab2_report.docx|Lab2 Report (DOC)}}|{{lab2_supplement.pdf|Lab2 Supplement (PDF)}} \\ {{lab2_supplement.pptx|Lab2 Supplement (PPT)}} ​|02.04| 
-| Lab 3: Verilog for Combinatorial Circuits |23.03.|23.03.|26.03.| | |09.04.+| Lab 3: Verilog for Combinatorial Circuits |23.03 |24.03 |26.03| {{Lab3_manual.pdf|Lab3 Manual}} \\ {{Lab3_report.pdf|Lab3 Report (PDF)}} \\ {{Lab3_report.docx|Lab3 Report (DOC)}}| {{lab3_supplement.pdf|Lab3 Supplement (PDF)}} \\ {{lab3_supplement.pptx|Lab3 Supplement (PPT)}} ​|09.04 | 
-| Lab 4: Finite State Machines |30.03.|30.03.|16.04.| | |30.04.+| Lab 4: Finite State Machines |30.03|31.03|16.04| {{Lab4_manual.pdf|Lab4 Manual}} \\ {{Lab4_report.pdf|Lab4 Report (PDF)}} \\ {{Lab4_report.docx|Lab4 Report (DOC)}} | {{lab4_supplement.pdf|Lab4 Supplement (PDF)}} \\ {{lab4_supplement.pptx|Lab4 Supplement (PPT)}} ​|30.04| 
-| Lab 5: Implementing an ALU |13.04.|13.04.|23.04.| | |07.05.+| Lab 5: Implementing an ALU |13.04|14.04|23.04| {{digitaldesign-s21-lab5_manual_afterlab.pdf|Lab5 Manual}} \\ {{digitaldesign-s21-lab5_report_afterlab.pdf|Lab5 Report (PDF)}} \\ {{digitaldesign-s21-lab5_report_afterlab.docx|Lab5 Report (DOC)}} | {{digitaldesign-s21-lab5_supplement_afterlab.pdf|Lab5 Supplement (PDF)}} \\ {{digitaldesign-s21-lab5_supplement_afterlab.pptx|Lab5 Supplement (PPT)}} ​|07.05| 
-| Lab 6: Testing the ALU |20.04.|20.04.|30.04.| | |14.05.+| Lab 6: Testing the ALU |20.04 |21.04 |30.04| {{Lab6_manual.pdf|Lab6 Manual}} \\ {{lab6_files.zip|Lab6 Files}} \\ {{Lab6_report.pdf|Lab6 Report (PDF)}} \\ {{Lab6_report.docx|Lab6 Report (DOC)}}| {{lab6_supplement.pdf|Lab6 Supplement (PDF)}} \\ {{lab6_supplement.pptx|Lab6 Supplement (PPT)}}  ​|14.05 | 
-| Lab 7: Writing Assembly Code |27.04.|27.04.|07.05.| | |21.05.+| Lab 7: Writing Assembly Code |27.04|28.04|07.05| {{Lab7_manual.pdf|Lab7 Manual}} \\ {{lab7_files.zip|Lab7 Files}} \\ {{Lab7_report.pdf|Lab7 Report (PDF)}} \\ {{Lab7_report.docx|Lab7 Report (DOC)}}| {{lab7_supplement.pdf|Lab7 Supplement (PDF)}} \\ {{lab7_supplement.pptx|Lab7 Supplement (PPT)}} ​|21.05| 
-| Lab 8: Full System Integration (Part I) |04.05.|04.05.|14.05.| | |28.05.+| Lab 8: Full System Integration (Part I) |04.05|05.05|14.05| {{lab8_manual.pdf|Lab8 Manual}} \\ {{digitec2021_lab8_files.zip|Lab8 Files}} \\ {{digitec2021_Lab8_report_Session1.pdf|Lab8.1 Report (PDF)}} \\ {{digitec2021_Lab8_report_Session1.docx|Lab8.1 Report (DOC)}} | {{digitaldesign-s21-lab8.1_supplement_afterlab.pdf|Lab8.1 Supplement (PDF)}} \\ {{digitaldesign-s21-lab8.1_supplement_afterlab.pptx|Lab8.1 Supplement (PPT)}} ​|28.05| 
-| Lab 8: Full System Integration (Part II) |11.05.|11.05.|21.05.| | |04.06.+| Lab 8: Full System Integration (Part II) |11.05|12.05|21.05|{{lab8_report-session2.pdf|Lab8.2 Report (PDF)}} \\ {{lab8_report-session2.docx|Lab8.2 Report (DOC)}} |{{digitaldesign-s21-lab8.2_supplement_afterlab.pdf|Lab8.2 Supplement (PDF)}} \\ {{digitaldesign-s21-lab8.2_supplement_afterlab.pptx|Lab8.2 Supplement (PPT)}} ​|04.06| 
-| Lab 9: The Performance of MIPS |18.05.|18.05.|28.05.| | |11.06.+| Lab 9: The Performance of MIPS |18.05|19.05|28.05| {{lab9_manual.pdf|Lab9 Manual (PDF)}} \\ {{lab9_report.pdf|Lab9 Report (PDF)}} \\ {{lab9_report.docx|Lab9 Report (DOC)}} \\ {{lab9_helpers.zip|Lab9 Helpers (ZIP)}} \\ {{lab9_student.zip|Lab9 Student (ZIP)}} ​  ​|{{lab9_supplement.pdf|Lab9 Supplement (PDF)}} \\ {{lab9_supplement.pptx|Lab9 Supplement (PPT)}} ​|11.06| 
-| Extra Session |25.05.|25.05.|04.06.| | |+| Extra Session |25.05|26.05|04.06| | |
  
 ===== Working with the FPGA Board ===== ===== Working with the FPGA Board =====
Line 37: Line 37:
  
 Q: Can I use my lab grades from previous years? \\ Q: Can I use my lab grades from previous years? \\
-A: Yes. You can find your past lab grades in Moodle (Spring 2020).+A: Yes. You can find your past lab grades in [[https://​moodle-app2.let.ethz.ch/​course/​view.php?​id=12285|Moodle (Spring 2020)]].
  
 Q: Can I use my lab grades from previous years and still do the labs? \\ Q: Can I use my lab grades from previous years and still do the labs? \\
labs.1614785572.txt.gz · Last modified: 2021/03/03 16:32 by hhasan