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Computer Architecture – Fall 2018 (263-2210-00L)

Welcome to the wiki for Computer Architecture for Fall 2018

Course Information

Description

Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation.

Objective

We will learn, for example, how to design the control and data path hardware for a MIPS-like processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems.

Content

The principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer (RT) implementation of a MIPS-like pipelined processor in System Verilog. In addition, we will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options.

Course description page
Moodle

Prerequisites: Digitaltechnik

Staff Information

Contact

Name E-mail Office Phone Office Hours
Instructor Onur Mutlu onur.mutlu@inf.ethz.ch CAB F 74.2 +41 44 632 88 53
Teaching Assistant Mohammed Alser mohammed.alser@inf.ethz.ch CAB D 77 TBD
Teaching Assistant Can Firtina can.firtina@inf.ethz.ch CAB D 77 Tue. 13:30 - 14:30
Teaching Assistant Geraldo Francisco geraldo.deoliveira@inf.ethz.ch CAB D 77 TBD
Teaching Assistant Hasan Hassan hhasan@inf.ethz.ch CAB E 78 +41 44 632 85 52 Thu. 4:00-5:00 pm
Teaching Assistant Jeremie Kim jeremie.kim@inf.ethz.ch CAB E 78 +41 44 632 24 96 TBD
Teaching Assistant Juan Gomez Luna juan.gomez@inf.ethz.ch CAB D 77 +41 44 632 60 76 Mon. 9:00-10:00am
Teaching Assistant Minesh Patel minesh.patel@inf.ethz.ch CAB E 78 +41 44 632 65 84 TBD
Teaching Assistant Giray Yaglikci abdullah.yaglikci@inf.ethz.ch CAB D 77 TBD
start.txt · Last modified: 2018/10/22 17:23 by firtinac