Wednesday 13 March 2019:
Manu Nair “Algorithms and circuit design for event-driven, in-memory computation”
10:30 CHN G46
Abstract: In this talk, Manu will present his work on the design of ultra-low-power neural network accelerators. In particular, he will describe the use of algorithmic and circuit co-design techniques to achieve the design objectives in an event-driven and in-memory computational framework.
Bio: Manu Nair is doing his Ph.D. in the Institute of Neuroinformatics at ETH with Prof. Giacomo Indiveri. Before starting his PhD, he worked in the semiconductor industry where he designed modules for low-power biomedical and image processing SoCs. His research deals with designing neuromorphic systems that use event-driven, in-memory architectures for low-power applications such as implantable biomedical devices or wearables, energy-harvesting sensors, etc. Manu is an expert in co-designing the algorithm and hardware. For instance, the most recent chip he designed implements a 256 node recurrent neural network that consumes less than 200 uW at 1.8 V, 180 nm. He has taped out 2 neuromorphic chips that are currently being tested. His research has led to 2 memory-related patents. Manu has a very significant amount of experience in both deep learning and circuit design. In total, he has about 8+ years of experience in mixed-signal and digital circuit design, of which 3 years were spent in the industry at Analog Devices and Apical Imaging (now acquired by ARM Holdings).