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extended_reading_list [2019/04/21 09:53] ewentextended_reading_list [2019/05/02 16:14] (current) ewent
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      Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, and <u>Onur Mutlu</u>,<br>      Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, and <u>Onur Mutlu</u>,<br>
      <b><a href="https://people.inf.ethz.ch/omutlu/pub/salp-dram_isca12.pdf">"A Case for Exploiting Subarray-Level Parallelism (SALP) in DRAM"</a></b><br> <i>Proceedings of the <a href="http://isca2012.ittc.ku.edu/">39th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Portland, OR, June 2012.      <b><a href="https://people.inf.ethz.ch/omutlu/pub/salp-dram_isca12.pdf">"A Case for Exploiting Subarray-Level Parallelism (SALP) in DRAM"</a></b><br> <i>Proceedings of the <a href="http://isca2012.ittc.ku.edu/">39th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Portland, OR, June 2012.
-     <a href="pub/kim_isca12_talk.pptx">Slides (pptx)</a> +     <a href="https://people.inf.ethz.ch/omutlu/pub/kim_isca12_talk.pptx">Slides (pptx)</a> 
      <br> </li>      <br> </li>
  
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 <p><li> <p><li>
      Moinuddin Qureshi, Dae Hyun Kim, Samira Khan, Prashant Nair, and <u>Onur Mutlu</u>,<br>       Moinuddin Qureshi, Dae Hyun Kim, Samira Khan, Prashant Nair, and <u>Onur Mutlu</u>,<br> 
-     <b><a href="pub/avatar-dram-refresh_dsn15.pdf">"AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/avatar-dram-refresh_dsn15.pdf">"AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems"</a></b> <br>
      <i>Proceedings of the <a href="http://2015.dsn.org/">45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks</a> (<b>DSN</b>)</i>, Rio de Janeiro, Brazil, June 2015.        <i>Proceedings of the <a href="http://2015.dsn.org/">45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks</a> (<b>DSN</b>)</i>, Rio de Janeiro, Brazil, June 2015.  
-     <br>[<a href="pub/avatar-dram-refresh_dsn15-talk.pptx">Slides (pptx)</a> <a href="pub/avatar-dram-refresh_dsn15-talk.pdf">(pdf)</a>+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/avatar-dram-refresh_dsn15-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/avatar-dram-refresh_dsn15-talk.pdf">(pdf)</a>
-<!--[<a href="pub/heterogeneous-reliability-memory-for-data-centers_luo_dsn14-talk.pptx">Slides (pptx)</a> <a href="pub/heterogeneous-reliability-memory-for-data-centers_luo_dsn14-talk.pdf">(pdf)</a>] [<a href="http://www.zdnet.com/how-good-does-memory-need-to-be-7000031853/">Coverage on ZDNet</a>]-->+<!--[<a href="https://people.inf.ethz.ch/omutlu/pub/heterogeneous-reliability-memory-for-data-centers_luo_dsn14-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/heterogeneous-reliability-memory-for-data-centers_luo_dsn14-talk.pdf">(pdf)</a>] [<a href="http://www.zdnet.com/how-good-does-memory-need-to-be-7000031853/">Coverage on ZDNet</a>]-->
  
 <p><li> <p><li>
      Samira Khan, Donghyuk Lee, and <u>Onur Mutlu</u>,<br>       Samira Khan, Donghyuk Lee, and <u>Onur Mutlu</u>,<br> 
-     <b><a href="pub/parbor-efficient-system-level-test-for-DRAM-failures_dsn16.pdf">"PARBOR: An Efficient System-Level Technique to Detect Data-Dependent Failures in DRAM"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/parbor-efficient-system-level-test-for-DRAM-failures_dsn16.pdf">"PARBOR: An Efficient System-Level Technique to Detect Data-Dependent Failures in DRAM"</a></b> <br>
      <i>Proceedings of the <a href="http://2015.dsn.org/">45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks</a> (<b>DSN</b>)</i>, Toulouse, France, June 2016.      <i>Proceedings of the <a href="http://2015.dsn.org/">45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks</a> (<b>DSN</b>)</i>, Toulouse, France, June 2016.
-     <br>[<a href="pub/parbor-efficient-system-level-test-for-DRAM-failures_khan_dsn16-talk.pptx">Slides (pptx)</a> <a href="pub/parbor-efficient-system-level-test-for-DRAM-failures_khan_dsn16-talk.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/parbor-efficient-system-level-test-for-DRAM-failures_khan_dsn16-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/parbor-efficient-system-level-test-for-DRAM-failures_khan_dsn16-talk.pdf">(pdf)</a>]
  
  
 <p><li> <p><li>
      Samira Khan, Chris Wilkerson, Zhe Wang, Alaa R. Alameldeen, Donghyuk Lee, and <u>Onur Mutlu</u>,<br>      Samira Khan, Chris Wilkerson, Zhe Wang, Alaa R. Alameldeen, Donghyuk Lee, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17.pdf">+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17.pdf">
      "Detecting and Mitigating Data-Dependent DRAM Failures by Exploiting Current Memory Content"</a></b><br>       "Detecting and Mitigating Data-Dependent DRAM Failures by Exploiting Current Memory Content"</a></b><br> 
      <i>Proceedings of the <a href="http://www.microarch.org/micro50/">50th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Boston, MA, USA, October 2017.       <i>Proceedings of the <a href="http://www.microarch.org/micro50/">50th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Boston, MA, USA, October 2017. 
-     <br>[<a href="pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-talk.pptx">Slides (pptx)</a> <a href="pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-talk.pdf">(pdf)</a>] [<a href="pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-lightning-talk.pdf">(pdf)</a>] [<a href="pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-poster.pptx">Poster (pptx)</a> <a href="pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-poster.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-lightning-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-poster.pptx">Poster (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/MEMCON-system-level-data-dependent-DRAM-failure-detection-mitigation_micro17-poster.pdf">(pdf)</a>]
      <!--br>[<a href="https://github.com/CMU-SAFARI/ASMSim">Source Code</a>]-->      <!--br>[<a href="https://github.com/CMU-SAFARI/ASMSim">Source Code</a>]-->
      <br> </li>      <br> </li>
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 <p><li>  <p><li> 
      Minesh Patel, Jeremie S. Kim, and <u>Onur Mutlu</u>,<br>      Minesh Patel, Jeremie S. Kim, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/reaper-dram-retention-profiling-lpddr4_isca17.pdf">"The Reach Profiler (REAPER): Enabling the Mitigation of DRAM Retention Failures via Profiling at Aggressive Conditions"</a></b><br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/reaper-dram-retention-profiling-lpddr4_isca17.pdf">"The Reach Profiler (REAPER): Enabling the Mitigation of DRAM Retention Failures via Profiling at Aggressive Conditions"</a></b><br>
      <i>Proceedings of the <a href="http://isca17.ece.utoronto.ca/doku.php">44th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Toronto, Canada, June 2017.      <i>Proceedings of the <a href="http://isca17.ece.utoronto.ca/doku.php">44th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Toronto, Canada, June 2017.
-     <br>[<a href="pub/reaper-dram-retention-profiling-lpddr4_isca17-talk.pptx">Slides (pptx)</a> <a href="pub/reaper-dram-retention-profiling-lpddr4_isca17-talk.pdf">(pdf)</a>+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/reaper-dram-retention-profiling-lpddr4_isca17-talk.pptx">Slides (pptx)</a> <a href="pub/reaper-dram-retention-profiling-lpddr4_isca17-talk.pdf">(pdf)</a>
-     <br>[<a href="pub/reaper-dram-retention-profiling-lpddr4_isca17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/reaper-dram-retention-profiling-lpddr4_isca17-lightning-talk.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/reaper-dram-retention-profiling-lpddr4_isca17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/reaper-dram-retention-profiling-lpddr4_isca17-lightning-talk.pdf">(pdf)</a>]
      <br></li>      <br></li>
  
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 <p><li> <p><li>
      Yixin Luo, Sriram Govindan, Bikash Sharma, Mark Santaniello, Justin Meza, Aman Kansal, Jie Liu, Badriddine Khessib, Kushagra Vaid, and <u>Onur Mutlu</u>,<br>       Yixin Luo, Sriram Govindan, Bikash Sharma, Mark Santaniello, Justin Meza, Aman Kansal, Jie Liu, Badriddine Khessib, Kushagra Vaid, and <u>Onur Mutlu</u>,<br> 
-     <b><a href="pub/heterogeneous-reliability-memory-for-data-centers_dsn14.pdf">"Characterizing Application Memory Error Vulnerability to Optimize Data Center Cost via Heterogeneous-Reliability Memory"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/heterogeneous-reliability-memory-for-data-centers_dsn14.pdf">"Characterizing Application Memory Error Vulnerability to Optimize Data Center Cost via Heterogeneous-Reliability Memory"</a></b> <br>
      <i>Proceedings of the <a href="http://2014.dsn.org/">44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks      <i>Proceedings of the <a href="http://2014.dsn.org/">44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks
-     </a> (<b>DSN</b>)</i>, Atlanta, GA, June 2014.  [<a href="pub/heterogeneous-reliability-memory_dsn14-summary.pdf">Summary</a> [<a href="pub/heterogeneous-reliability-memory-for-data-centers_luo_dsn14-talk.pptx">Slides (pptx)</a> <a href="pub/heterogeneous-reliability-memory-for-data-centers_luo_dsn14-talk.pdf">(pdf)</a>] [<a href="http://www.zdnet.com/how-good-does-memory-need-to-be-7000031853/">Coverage on ZDNet</a>]+     </a> (<b>DSN</b>)</i>, Atlanta, GA, June 2014.  [<a href="https://people.inf.ethz.ch/omutlu/pub/heterogeneous-reliability-memory_dsn14-summary.pdf">Summary</a> [<a href="https://people.inf.ethz.ch/omutlu/pub/heterogeneous-reliability-memory-for-data-centers_luo_dsn14-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/heterogeneous-reliability-memory-for-data-centers_luo_dsn14-talk.pdf">(pdf)</a>] [<a href="http://www.zdnet.com/how-good-does-memory-need-to-be-7000031853/">Coverage on ZDNet</a>]
  
 </ul> </ul>
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      ><u>Onur Mutlu</u>, Jared      ><u>Onur Mutlu</u>, Jared
      Stark, Chris Wilkerson, and Yale N. Patt, <br>      Stark, Chris Wilkerson, and Yale N. Patt, <br>
-     <b><a href="pub/mutlu_ieee_micro03.pdf">&quot;Runahead Execution: An+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/mutlu_ieee_micro03.pdf">&quot;Runahead Execution: An
      Effective Alternative to Large Instruction Windows&quot;</a></b><br>      Effective Alternative to Large Instruction Windows&quot;</a></b><br>
      <i><a href="http://doi.ieeecomputersociety.org/10.1109/MM.2003.1261383">IEEE      <i><a href="http://doi.ieeecomputersociety.org/10.1109/MM.2003.1261383">IEEE
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      ><u>Onur Mutlu</u>, Jared      ><u>Onur Mutlu</u>, Jared
      Stark, Chris Wilkerson, and Yale N. Patt, <br>      Stark, Chris Wilkerson, and Yale N. Patt, <br>
-     <b><a href="pub/mutlu_hpca03.pdf">&quot;Runahead Execution: An Alternative+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/mutlu_hpca03.pdf">&quot;Runahead Execution: An Alternative
      to Very Large Instruction Windows for Out-of-order Processors&quot;</a></b><br>      to Very Large Instruction Windows for Out-of-order Processors&quot;</a></b><br>
      <i>Proceedings of the <a href="http://www.cs.arizona.edu/hpca9/">9th      <i>Proceedings of the <a href="http://www.cs.arizona.edu/hpca9/">9th
      International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>,      International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>,
      pages 129-140, Anaheim, CA, February 2003. <a      pages 129-140, Anaheim, CA, February 2003. <a
-     href="pub/mutlu_hpca03_talk.pdf">Slides (pdf)</a> <br>+     href="https://people.inf.ethz.ch/omutlu/pub/mutlu_hpca03_talk.pdf">Slides (pdf)</a> <br>
      <b><i><span style='color:red'>One of the 15 computer architecture papers      <b><i><span style='color:red'>One of the 15 computer architecture papers
      of 2003 selected as Top Picks by IEEE Micro.</span></i></b> </li>      of 2003 selected as Top Picks by IEEE Micro.</span></i></b> </li>
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 <p><li> <p><li>
      Amirali Boroumand, Saugata Ghose, Youngsok Kim, Rachata Ausavarungnirun, Eric Shiu, Rahul Thakur, Daehyun Kim, Aki Kuusela, Allan Knies, Parthasarathy Ranganathan, and <u>Onur Mutlu</u>,<br>      Amirali Boroumand, Saugata Ghose, Youngsok Kim, Rachata Ausavarungnirun, Eric Shiu, Rahul Thakur, Daehyun Kim, Aki Kuusela, Allan Knies, Parthasarathy Ranganathan, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18.pdf">"Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18.pdf">"Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks"</a></b> <br>
      <i>Proceedings of the <a href="https://www.asplos2018.org/">23rd International Conference on Architectural Support for Programming Languages and Operating Systems</a> (<b>ASPLOS</b>)</i>, Williamsburg, VA, USA, March 2018.      <i>Proceedings of the <a href="https://www.asplos2018.org/">23rd International Conference on Architectural Support for Programming Languages and Operating Systems</a> (<b>ASPLOS</b>)</i>, Williamsburg, VA, USA, March 2018.
-     <br>[<a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-talk.pptx">Slides (pptx)</a> <a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-talk.pdf">(pdf)</a>] [<a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-lightning-talk.pdf">(pdf)</a>] [<a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-poster.pptx">Poster (pptx)</a> <a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-poster.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-lightning-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-poster.pptx">Poster (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-poster.pdf">(pdf)</a>]
      <!--br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]-->      <!--br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]-->
  
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 <p><li>Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, <u>Onur Mutlu</u>, Michael A. Kozuch, Phillip B. Gibbons, and Todd C. Mowry,<br> <p><li>Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, <u>Onur Mutlu</u>, Michael A. Kozuch, Phillip B. Gibbons, and Todd C. Mowry,<br>
-     <b><a href="pub/rowclone_micro13.pdf">+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/rowclone_micro13.pdf">
      "RowClone: Fast and Energy-Efficient In-DRAM Bulk Data Copy and Initialization"</a></b><br>       "RowClone: Fast and Energy-Efficient In-DRAM Bulk Data Copy and Initialization"</a></b><br> 
      <i>Proceedings of the <a href="http://www.microarch.org/micro46/">46th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Davis, CA, December 2013.       <i>Proceedings of the <a href="http://www.microarch.org/micro46/">46th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Davis, CA, December 2013. 
-     [<a href="pub/rowclone_seshadri_micro13-talk.pptx">Slides (pptx)</a> <a href="pub/rowclone_seshadri_micro13-talk.pdf">(pdf)</a>] [<a href="pub/rowclone_seshadri_micro13_lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/rowclone_seshadri_micro13_lightning-talk.pdf">(pdf)</a>] [<a href="pub/rowclone_seshadri_micro13-poster.pptx">Poster (pptx)</a> <a href="pub/rowclone_seshadri_micro13-poster.pdf">(pdf)</a>]+     [<a href="https://people.inf.ethz.ch/omutlu/pub/rowclone_seshadri_micro13-talk.pptx">Slides (pptx)</a> <a href="pub/rowclone_seshadri_micro13-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/rowclone_seshadri_micro13_lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/rowclone_seshadri_micro13_lightning-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/rowclone_seshadri_micro13-poster.pptx">Poster (pptx)</a> <a href="pub/rowclone_seshadri_micro13-poster.pdf">(pdf)</a>]
      <br> </li>      <br> </li>
  
 <p><li> <p><li>
      Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie Kim, Michael A. Kozuch, <u>Onur Mutlu</u>, Phillip B. Gibbons, and Todd C. Mowry,<br>      Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie Kim, Michael A. Kozuch, <u>Onur Mutlu</u>, Phillip B. Gibbons, and Todd C. Mowry,<br>
-     <b><a href="pub/ambit-bulk-bitwise-dram_micro17.pdf">+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17.pdf">
      "Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology"</a></b><br>       "Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology"</a></b><br> 
      <i>Proceedings of the <a href="http://www.microarch.org/micro50/">50th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Boston, MA, USA, October 2017.       <i>Proceedings of the <a href="http://www.microarch.org/micro50/">50th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Boston, MA, USA, October 2017. 
-     <br>[<a href="pub/ambit-bulk-bitwise-dram_micro17-talk.pptx">Slides (pptx)</a> <a href="pub/ambit-bulk-bitwise-dram_micro17-talk.pdf">(pdf)</a>] [<a href="pub/ambit-bulk-bitwise-dram_micro17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/ambit-bulk-bitwise-dram_micro17-lightning-talk.pdf">(pdf)</a>] [<a href="pub/ambit-bulk-bitwise-dram_micro17-poster.pptx">Poster (pptx)</a> <a href="pub/ambit-bulk-bitwise-dram_micro17-poster.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-lightning-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-poster.pptx">Poster (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-poster.pdf">(pdf)</a>]
      <!--br>[<a href="https://github.com/CMU-SAFARI/ASMSim">Source Code</a>]-->      <!--br>[<a href="https://github.com/CMU-SAFARI/ASMSim">Source Code</a>]-->
      <br> </li>      <br> </li>
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 <p><li>  <p><li> 
      Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, <u>Onur Mutlu</u>, and Kiyoung Choi,<br>      Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, <u>Onur Mutlu</u>, and Kiyoung Choi,<br>
-     <b><a href="pub/tesseract-pim-architecture-for-graph-processing_isca15.pdf">"A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing"</a></b><br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15.pdf">"A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing"</a></b><br>
      <i>Proceedings of the <a href="http://www.ece.cmu.edu/calcm/isca2015/">42nd International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Portland, OR, June 2015.      <i>Proceedings of the <a href="http://www.ece.cmu.edu/calcm/isca2015/">42nd International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Portland, OR, June 2015.
-     <br>[<a href="pub/tesseract-pim-architecture-for-graph-processing_isca15-talk.pdf">Slides (pdf)</a>] [<a href="pub/tesseract-pim-architecture-for-graph-processing_isca15-lightning-talk.pdf">Lightning Session Slides (pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15-talk.pdf">Slides (pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15-lightning-talk.pdf">Lightning Session Slides (pdf)</a>]
      <br><b><i><font color="red"'>Top Picks Honorable Mention by IEEE Micro.</font></i></b>       <br><b><i><font color="red"'>Top Picks Honorable Mention by IEEE Micro.</font></i></b> 
-     <!-- [<a href="pub/dirty-block-index_seshadri_talk_isca14.pptx">Slides (pptx)</a> <a href="pub/dirty-block-index_seshadri_talk_isca14.pdf">(pdf)</a>] [<a href="pub/dirty-block-index_seshadri_lightning-talk_isca14.pptx">Lightning Session Slides (pptx)</a> <a href="pub/dirty-block-index_seshadri_lightning-talk_isca14.pdf">(pdf)</a>] -->+     <!-- [<a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_talk_isca14.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_talk_isca14.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_lightning-talk_isca14.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_lightning-talk_isca14.pdf">(pdf)</a>] -->
      <br></li>      <br></li>
  
 <p><li>  <p><li> 
      Kevin Hsieh, Eiman Ebrahimi, Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Nandita Vijaykumar, <u>Onur Mutlu</u>, and Stephen W. Keckler,<br>      Kevin Hsieh, Eiman Ebrahimi, Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Nandita Vijaykumar, <u>Onur Mutlu</u>, and Stephen W. Keckler,<br>
-     <b><a href="pub/TOM-programmer-transparent-GPU-near-data-processing_isca16.pdf">"Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems"</a></b><br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_isca16.pdf">"Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems"</a></b><br>
      <i>Proceedings of the <a href="http://isca2016.eecs.umich.edu/">43rd International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Seoul, South Korea, June 2016.      <i>Proceedings of the <a href="http://isca2016.eecs.umich.edu/">43rd International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Seoul, South Korea, June 2016.
-     <br>[<a href="pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-talk.pptx">Slides (pptx)</a> <a href="pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-talk.pdf">(pdf)</a>]  +     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-talk.pdf">(pdf)</a>]  
-     <br>[<a href="pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-lightning-talk.pdf">(pdf)</a>+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-lightning-talk.pdf">(pdf)</a>
      <br></li>      <br></li>
  
 <p><li>Ashutosh Pattnaik, Xulong Tang, Adwait Jog, Onur Kayiran, Asit K. Mishra, Mahmut T. Kandemir, <u>Onur Mutlu</u>, and Chita R. Das,<br> <p><li>Ashutosh Pattnaik, Xulong Tang, Adwait Jog, Onur Kayiran, Asit K. Mishra, Mahmut T. Kandemir, <u>Onur Mutlu</u>, and Chita R. Das,<br>
-     <b><a href="pub/scheduling-for-GPU-processing-in-memory_pact16.pdf">"Scheduling Techniques for GPU Architectures with Processing-In-Memory Capabilities"</a></b><br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/scheduling-for-GPU-processing-in-memory_pact16.pdf">"Scheduling Techniques for GPU Architectures with Processing-In-Memory Capabilities"</a></b><br>
      <i>Proceedings of the <a href="http://pactconf.org/">25th International Conference on Parallel Architectures and Compilation Techniques</a> (<b>PACT</b>)</i>, Haifa, Israel, September 2016.      <i>Proceedings of the <a href="http://pactconf.org/">25th International Conference on Parallel Architectures and Compilation Techniques</a> (<b>PACT</b>)</i>, Haifa, Israel, September 2016.
-     <br>[<a href="pub/scheduling-for-GPU-processing-in-memory_pattnaik_pact16-talk.pptx">Slides (pptx)</a>  <a href="pub/scheduling-for-GPU-processing-in-memory_pattnaik_pact16-talk.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/scheduling-for-GPU-processing-in-memory_pattnaik_pact16-talk.pptx">Slides (pptx)</a>  <a href="https://people.inf.ethz.ch/omutlu/pub/scheduling-for-GPU-processing-in-memory_pattnaik_pact16-talk.pdf">(pdf)</a>]
      <!-- <br>[<a href="https://github.com/CMU-SAFARI/MeDiC">Source Code</a>] -->      <!-- <br>[<a href="https://github.com/CMU-SAFARI/MeDiC">Source Code</a>] -->
      <br> </li>      <br> </li>
  
 <p><li>Kevin Hsieh, Samira Khan, Nandita Vijaykumar, Kevin K. Chang, Amirali Boroumand, Saugata Ghose, and <u>Onur Mutlu</u>,<br> <p><li>Kevin Hsieh, Samira Khan, Nandita Vijaykumar, Kevin K. Chang, Amirali Boroumand, Saugata Ghose, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/in-memory-pointer-chasing-accelerator_iccd16.pdf">"Accelerating Pointer Chasing in 3D-Stacked Memory: Challenges, Mechanisms, Evaluation"</a></b><br> +     <b><a href="https://people.inf.ethz.ch/omutlu/pub/in-memory-pointer-chasing-accelerator_iccd16.pdf">"Accelerating Pointer Chasing in 3D-Stacked Memory: Challenges, Mechanisms, Evaluation"</a></b><br> 
      <i> Proceedings of the <a href="http://www.iccd-conf.com/">34th IEEE International Conference on Computer Design</a> (<b>ICCD</b>)</i>, Phoenix, AZ, USA, October 2016.      <i> Proceedings of the <a href="http://www.iccd-conf.com/">34th IEEE International Conference on Computer Design</a> (<b>ICCD</b>)</i>, Phoenix, AZ, USA, October 2016.
-     <br>[<a href="pub/in-memory-pointer-chasing-accelerator_hsieh_iccd16-talk.pptx">Slides (pptx)</a> <a href="pub/in-memory-pointer-chasing-accelerator_hsieh_iccd16-talk.pdf">(pdf)</a>+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/in-memory-pointer-chasing-accelerator_hsieh_iccd16-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/in-memory-pointer-chasing-accelerator_hsieh_iccd16-talk.pdf">(pdf)</a>
      <!-- <br> <a href="pub/bliss-memory-scheduler_cmu-safari-tr15.pdf">An extended version</a> as SAFARI Technical Report, TR-SAFARI-2015-004, Carnegie Mellon University, March 2015.-->      <!-- <br> <a href="pub/bliss-memory-scheduler_cmu-safari-tr15.pdf">An extended version</a> as SAFARI Technical Report, TR-SAFARI-2015-004, Carnegie Mellon University, March 2015.-->
      <br>[<a href="https://github.com/CMU-SAFARI/IMPICA">Source Code</a>]      <br>[<a href="https://github.com/CMU-SAFARI/IMPICA">Source Code</a>]
Line 419: Line 419:
 <p><li>  <p><li> 
      Milad Hashemi, Khubaib, Eiman Ebrahimi, <u>Onur Mutlu</u>, and Yale N. Patt,<br>      Milad Hashemi, Khubaib, Eiman Ebrahimi, <u>Onur Mutlu</u>, and Yale N. Patt,<br>
-     <b><a href="pub/enhanced-memory-controller-for-dependent-loads_isca16.pdf">"Accelerating Dependent Cache Misses with an Enhanced Memory Controller"</a></b><br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/enhanced-memory-controller-for-dependent-loads_isca16.pdf">"Accelerating Dependent Cache Misses with an Enhanced Memory Controller"</a></b><br>
      <i>Proceedings of the <a href="http://isca2016.eecs.umich.edu/">43rd International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Seoul, South Korea, June 2016.      <i>Proceedings of the <a href="http://isca2016.eecs.umich.edu/">43rd International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Seoul, South Korea, June 2016.
-     <br>[<a href="pub/enhanced-memory-controller-for-dependent-loads_milad_isca16-talk.pptx">Slides (pptx)</a> <a href="pub/enhanced-memory-controller-for-dependent-loads_milad_isca16-talk.pdf">(pdf)</a>]  +     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/enhanced-memory-controller-for-dependent-loads_milad_isca16-talk.pptx">Slides (pptx)</a> <a href="pub/enhanced-memory-controller-for-dependent-loads_milad_isca16-talk.pdf">(pdf)</a>]  
-     <br>[<a href="pub/enhanced-memory-controller-for-dependent-loads_milad_isca16-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/enhanced-memory-controller-for-dependent-loads_milad_isca16-lightning-talk.pdf">(pdf)</a>+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/enhanced-memory-controller-for-dependent-loads_milad_isca16-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/enhanced-memory-controller-for-dependent-loads_milad_isca16-lightning-talk.pdf">(pdf)</a>
      <!-- [<a href="pub/dirty-block-index_seshadri_talk_isca14.pptx">Slides (pptx)</a> <a href="pub/dirty-block-index_seshadri_talk_isca14.pdf">(pdf)</a>] [<a href="pub/dirty-block-index_seshadri_lightning-talk_isca14.pptx">Lightning Session Slides (pptx)</a> <a href="pub/dirty-block-index_seshadri_lightning-talk_isca14.pdf">(pdf)</a>] -->      <!-- [<a href="pub/dirty-block-index_seshadri_talk_isca14.pptx">Slides (pptx)</a> <a href="pub/dirty-block-index_seshadri_talk_isca14.pdf">(pdf)</a>] [<a href="pub/dirty-block-index_seshadri_lightning-talk_isca14.pptx">Lightning Session Slides (pptx)</a> <a href="pub/dirty-block-index_seshadri_lightning-talk_isca14.pdf">(pdf)</a>] -->
      <br></li>      <br></li>
  
 <p><li>Milad Hashemi, <u>Onur Mutlu</u>, and Yale N. Patt,<br> <p><li>Milad Hashemi, <u>Onur Mutlu</u>, and Yale N. Patt,<br>
-     <b><a href="pub/continuous-runahead-engine_micro16.pdf">+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/continuous-runahead-engine_micro16.pdf">
      "Continuous Runahead: Transparent Hardware Acceleration for Memory Intensive Workloads"</a></b><br>       "Continuous Runahead: Transparent Hardware Acceleration for Memory Intensive Workloads"</a></b><br> 
      <i>Proceedings of the <a href="http://www.microarch.org/micro49/">49th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Taipei, Taiwan, October 2016.       <i>Proceedings of the <a href="http://www.microarch.org/micro49/">49th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Taipei, Taiwan, October 2016. 
-     <br>[<a href="pub/continuous-runahead-engine_micro16-talk.pptx">Slides (pptx)</a> <a href="pub/continuous-runahead-engine_micro16-talk.pdf">(pdf)</a>] [<a href="pub/continuous-runahead-engine_micro16-lightning-session-talk.pdf">Lightning Session Slides (pdf)</a><!--a href="pub/application-slowdown-model_lavanya_micro15-lightning-talk.pdf">(pdf)</a-->] [<a href="pub/continuous-runahead-engine_micro16-poster.pptx">Poster (pptx)</a> <a href="pub/continuous-runahead-engine_micro16-poster.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/continuous-runahead-engine_micro16-talk.pptx">Slides (pptx)</a> <a href="pub/continuous-runahead-engine_micro16-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/continuous-runahead-engine_micro16-lightning-session-talk.pdf">Lightning Session Slides (pdf)</a><!--a href="pub/application-slowdown-model_lavanya_micro15-lightning-talk.pdf">(pdf)</a-->] [<a href="pub/continuous-runahead-engine_micro16-poster.pptx">Poster (pptx)</a> <a href="pub/continuous-runahead-engine_micro16-poster.pdf">(pdf)</a>]
      <br><b><i><font color="red">One of the six papers nominated for the Best Paper Award by the Program Committee.</font></i></b>       <br><b><i><font color="red">One of the six papers nominated for the Best Paper Award by the Program Committee.</font></i></b> 
      <!--br>[<a href="https://github.com/CMU-SAFARI/ASMSim">Source Code</a>]-->      <!--br>[<a href="https://github.com/CMU-SAFARI/ASMSim">Source Code</a>]-->
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 <p><li> <p><li>
      Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, and <u>Onur Mutlu</u>,<br>      Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/LazyPIM-coherence-for-processing-in-memory_ieee-cal16.pdf">"LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory"</a></b><br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/LazyPIM-coherence-for-processing-in-memory_ieee-cal16.pdf">"LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory"</a></b><br>
      <i><a href="http://www.computer.org/web/cal">IEEE Computer Architecture Letters</a> (<b>CAL</b>)</i>, June 2016.       <i><a href="http://www.computer.org/web/cal">IEEE Computer Architecture Letters</a> (<b>CAL</b>)</i>, June 2016. 
      <!--br>[<a href="https://github.com/CMU-SAFARI/ramulator">Source Code</a>]-->      <!--br>[<a href="https://github.com/CMU-SAFARI/ramulator">Source Code</a>]-->
Line 457: Line 457:
 <p><li>  <p><li> 
      Zhiyu Liu, Irina Calciu, Maurice Herlihy, and <u>Onur Mutlu</u>,<br>      Zhiyu Liu, Irina Calciu, Maurice Herlihy, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/concurrent-data-structures-for-PIM_spaa17.pdf">"Concurrent Data Structures for Near-Memory Computing"</a></b><br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/concurrent-data-structures-for-PIM_spaa17.pdf">"Concurrent Data Structures for Near-Memory Computing"</a></b><br>
      <i>Proceedings of the <a href="https://spaa.acm.org/">29th ACM Symposium on Parallelism in Algorithms and Architectures</a> (<b>SPAA</b>)</i>, Washington, DC, USA, July 2017.      <i>Proceedings of the <a href="https://spaa.acm.org/">29th ACM Symposium on Parallelism in Algorithms and Architectures</a> (<b>SPAA</b>)</i>, Washington, DC, USA, July 2017.
-     <br>[<a href="pub/concurrent-data-structures-for-PIM_spaa17-talk.pptx">Slides (pptx)</a> <a href="pub/concurrent-data-structures-for-PIM_spaa17-talk.pdf">(pdf)</a>+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/concurrent-data-structures-for-PIM_spaa17-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/concurrent-data-structures-for-PIM_spaa17-talk.pdf">(pdf)</a>
-     <!--br>[<a href="pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-lightning-talk.pdf">(pdf)</a>] -->+     <!--br>[<a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-lightning-talk.pdf">(pdf)</a>] -->
      <br></li>      <br></li>
  
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 <p><li> <p><li>
      Yoongu Kim, Weikun Yang, and <u>Onur Mutlu</u>,<br>      Yoongu Kim, Weikun Yang, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/ramulator_dram_simulator-ieee-cal15.pdf">"Ramulator: A Fast and Extensible DRAM Simulator"</a></b><br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf">"Ramulator: A Fast and Extensible DRAM Simulator"</a></b><br>
      <i><a href="http://www.computer.org/web/cal">IEEE Computer Architecture Letters</a> (<b>CAL</b>)</i>, March 2015.       <i><a href="http://www.computer.org/web/cal">IEEE Computer Architecture Letters</a> (<b>CAL</b>)</i>, March 2015. 
      <br>[<a href="https://github.com/CMU-SAFARI/ramulator">Source Code</a>]      <br>[<a href="https://github.com/CMU-SAFARI/ramulator">Source Code</a>]
Line 478: Line 478:
 <p><li> <p><li>
      Hasan Hassan, Nandita Vijaykumar, Samira Khan, Saugata Ghose, Kevin Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, and <u>Onur Mutlu</u>,<br>      Hasan Hassan, Nandita Vijaykumar, Samira Khan, Saugata Ghose, Kevin Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/softMC_hpca17.pdf">"SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/softMC_hpca17.pdf">"SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies"</a></b> <br>
      <i>Proceedings of the <a href="https://hpca2017.org/">23rd International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Austin, TX, USA, February 2017.            <i>Proceedings of the <a href="https://hpca2017.org/">23rd International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Austin, TX, USA, February 2017.      
-     <br>[<a href="pub/softMC_hpca17-talk.pptx">Slides (pptx)</a> <a href="pub/softMC_hpca17-talk.pdf">(pdf)</a>] [<a href="pub/softMC_hpca17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/softMC_hpca17-lightning-talk.pdf">(pdf)</a>+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/softMC_hpca17-talk.pptx">Slides (pptx)</a> <a href="pub/softMC_hpca17-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/softMC_hpca17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/softMC_hpca17-lightning-talk.pdf">(pdf)</a>
      <br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]      <br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]
 </li> </li>
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      <i><a href="http://www.biomedcentral.com/bmcgenomics/"><b>BMC Genomics</b></a></i>, 2018. <!--a href="http://www.biomedcentral.com/content/pdf/1471-2164-14-S1-S13.pdf">PDF article</a><br-->      <i><a href="http://www.biomedcentral.com/bmcgenomics/"><b>BMC Genomics</b></a></i>, 2018. <!--a href="http://www.biomedcentral.com/content/pdf/1471-2164-14-S1-S13.pdf">PDF article</a><br-->
      <br><i>Proceedings of the <a href="http://apbc2018.bio.keio.ac.jp/">16th Asia Pacific Bioinformatics Conference</a> (<b>APBC</b>)</i>, Yokohama, Japan, January 2018.       <br><i>Proceedings of the <a href="http://apbc2018.bio.keio.ac.jp/">16th Asia Pacific Bioinformatics Conference</a> (<b>APBC</b>)</i>, Yokohama, Japan, January 2018. 
-     <br>[<a href="pub/GRIM-filter-DNA-pre-alignment-in-memory_apbc18-talk.pptx">Slides (pptx)</a> <a href="GRIM-filter-DNA-pre-alignment-in-memory_apbc18-talk.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/GRIM-filter-DNA-pre-alignment-in-memory_apbc18-talk.pptx">Slides (pptx)</a> <a href="GRIM-filter-DNA-pre-alignment-in-memory_apbc18-talk.pdf">(pdf)</a>]
      <br>[<a href="https://github.com/CMU-SAFARI/GRIM">Source Code</a>]      <br>[<a href="https://github.com/CMU-SAFARI/GRIM">Source Code</a>]
      <br><a href="https://arxiv.org/pdf/1711.01177.pdf">arxiv.org Version (pdf)</a>      <br><a href="https://arxiv.org/pdf/1711.01177.pdf">arxiv.org Version (pdf)</a>
Line 503: Line 503:
 <p><li> <p><li>
      Amirali Boroumand, Saugata Ghose, Youngsok Kim, Rachata Ausavarungnirun, Eric Shiu, Rahul Thakur, Daehyun Kim, Aki Kuusela, Allan Knies, Parthasarathy Ranganathan, and <u>Onur Mutlu</u>,<br>      Amirali Boroumand, Saugata Ghose, Youngsok Kim, Rachata Ausavarungnirun, Eric Shiu, Rahul Thakur, Daehyun Kim, Aki Kuusela, Allan Knies, Parthasarathy Ranganathan, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18.pdf">"Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18.pdf">"Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks"</a></b> <br>
      <i>Proceedings of the <a href="https://www.asplos2018.org/">23rd International Conference on Architectural Support for Programming Languages and Operating Systems</a> (<b>ASPLOS</b>)</i>, Williamsburg, VA, USA, March 2018.      <i>Proceedings of the <a href="https://www.asplos2018.org/">23rd International Conference on Architectural Support for Programming Languages and Operating Systems</a> (<b>ASPLOS</b>)</i>, Williamsburg, VA, USA, March 2018.
-     <br>[<a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-talk.pptx">Slides (pptx)</a> <a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-talk.pdf">(pdf)</a>] [<a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-lightning-talk.pdf">(pdf)</a>] [<a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-poster.pptx">Poster (pptx)</a> <a href="pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-poster.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-lightning-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-poster.pptx">Poster (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-poster.pdf">(pdf)</a>]
      <!--br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]-->      <!--br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]-->
 </li> </li>
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      <i>Invited Book Chapter</i>, to appear in 2018.      <i>Invited Book Chapter</i>, to appear in 2018.
      <br>[<a href="https://arxiv.org/pdf/1802.00320.pdf">Preliminary arxiv.org version</a>]      <br>[<a href="https://arxiv.org/pdf/1802.00320.pdf">Preliminary arxiv.org version</a>]
-     <!--br>[<a href="pub/onur-Rowhammer-Memory-Security_date17-invited-talk.pptx">Slides (pptx)</a> <a href="pub/onur-Rowhammer-Memory-Security_date17-invited-talk.pdf">(pdf)</a>]--> +     <!--br>[<a href="https://people.inf.ethz.ch/omutlu/pub/onur-Rowhammer-Memory-Security_date17-invited-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/onur-Rowhammer-Memory-Security_date17-invited-talk.pdf">(pdf)</a>]--> 
      </li>      </li>
  
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 <p><li> <p><li>
      Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Khan, Vivek Seshadri, Kevin Chang, and <u>Onur Mutlu</u>,<br>      Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Khan, Vivek Seshadri, Kevin Chang, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/adaptive-latency-dram_hpca15.pdf">"Adaptive-Latency DRAM: Optimizing DRAM Timing for the Common-Case"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/adaptive-latency-dram_hpca15.pdf">"Adaptive-Latency DRAM: Optimizing DRAM Timing for the Common-Case"</a></b> <br>
      <i>Proceedings of the <a href="http://darksilicon.org/hpca/">21st International Symposium on High-Performance Computer       <i>Proceedings of the <a href="http://darksilicon.org/hpca/">21st International Symposium on High-Performance Computer 
      Architecture</a> (<b>HPCA</b>)</i>, Bay Area, CA, February 2015.            Architecture</a> (<b>HPCA</b>)</i>, Bay Area, CA, February 2015.      
-     <br>[<a href="pub/adaptive-latency-dram_donghyuk_hpca15-talk.pptx">Slides (pptx)</a> <a href="pub/adaptive-latency-dram_donghyuk_hpca15-talk.pdf">(pdf)</a>] [<a href="http://www.ece.cmu.edu/~safari/tools/aldram-hpca2015-fulldata.html">Full data sets</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/adaptive-latency-dram_donghyuk_hpca15-talk.pptx">Slides (pptx)</a> <a href="pub/adaptive-latency-dram_donghyuk_hpca15-talk.pdf">(pdf)</a>] [<a href="http://www.ece.cmu.edu/~safari/tools/aldram-hpca2015-fulldata.html">Full data sets</a>]
 </li> </li>
  
 <p><li> <p><li>
      Kevin Chang, Abhijith Kashyap, Hasan Hassan, Samira Khan, Kevin Hsieh, Donghyuk Lee, Saugata Ghose, Gennady Pekhimenko, Tianshi Li, and <u>Onur Mutlu</u>,<br>      Kevin Chang, Abhijith Kashyap, Hasan Hassan, Samira Khan, Kevin Hsieh, Donghyuk Lee, Saugata Ghose, Gennady Pekhimenko, Tianshi Li, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/understanding-latency-variation-in-DRAM-chips_sigmetrics16.pdf">"Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/understanding-latency-variation-in-DRAM-chips_sigmetrics16.pdf">"Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization"</a></b> <br>
      <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2016/"> ACM International Conference on Measurement and Modeling of Computer Systems</a>       <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2016/"> ACM International Conference on Measurement and Modeling of Computer Systems</a> 
      (<b>SIGMETRICS</b>)</i>, Antibes Juan-Les-Pins, France, June 2016.      (<b>SIGMETRICS</b>)</i>, Antibes Juan-Les-Pins, France, June 2016.
-     <br>[<a href="pub/understanding-latency-variation-in-DRAM-chips_kevinchang_sigmetrics16-talk.pptx">Slides (pptx)</a> <a href="pub/understanding-latency-variation-in-DRAM-chips_kevinchang_sigmetrics16-talk.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/understanding-latency-variation-in-DRAM-chips_kevinchang_sigmetrics16-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/understanding-latency-variation-in-DRAM-chips_kevinchang_sigmetrics16-talk.pdf">(pdf)</a>]
      <br>[<a href="https://github.com/CMU-SAFARI/DRAM-Latency-Variation-Study">Source Code</a>]      <br>[<a href="https://github.com/CMU-SAFARI/DRAM-Latency-Variation-Study">Source Code</a>]
 </li> </li>
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 <p><li> <p><li>
      Donghyuk Lee, Samira Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, and <u>Onur Mutlu</u>,<br>      Donghyuk Lee, Samira Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/DIVA-low-latency-DRAM_sigmetrics17-paper.pdf">"Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/DIVA-low-latency-DRAM_sigmetrics17-paper.pdf">"Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms"</a></b> <br>
      <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2017/"> ACM International Conference on Measurement and Modeling of Computer Systems</a>       <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2017/"> ACM International Conference on Measurement and Modeling of Computer Systems</a> 
      (<b>SIGMETRICS</b>)</i>, Urbana-Champaign, IL, USA, June 2017.      (<b>SIGMETRICS</b>)</i>, Urbana-Champaign, IL, USA, June 2017.
-     <br>[<a href="pub/DIVA-low-latency-DRAM_sigmetrics17-abstract.pdf">Abstract</a>] [<a href="pub/DIVA-low-latency-DRAM_sigmetrics17-pomacs-onecolumn.pdf">POMACS Journal Version (same content, different format)</a>+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/DIVA-low-latency-DRAM_sigmetrics17-abstract.pdf">Abstract</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/DIVA-low-latency-DRAM_sigmetrics17-pomacs-onecolumn.pdf">POMACS Journal Version (same content, different format)</a>
-     <br>[<a href="pub/DIVA-low-latency-DRAM_sigmetrics17-talk.pptx">Slides (pptx)</a> <a href="pub/DIVA-low-latency-DRAM_sigmetrics17-talk.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/DIVA-low-latency-DRAM_sigmetrics17-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/DIVA-low-latency-DRAM_sigmetrics17-talk.pdf">(pdf)</a>]
      <!--br>[<a href="https://github.com/CMU-SAFARI/DRAM-Latency-Variation-Study">Source Code</a>]-->      <!--br>[<a href="https://github.com/CMU-SAFARI/DRAM-Latency-Variation-Study">Source Code</a>]-->
 </li> </li>
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 <p><li> <p><li>
      Kevin Chang, A. Giray Yaglikci, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, and <u>Onur Mutlu</u>,<br>      Kevin Chang, A. Giray Yaglikci, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/Voltron-reduced-voltage-DRAM-sigmetrics17-paper.pdf">"Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/Voltron-reduced-voltage-DRAM-sigmetrics17-paper.pdf">"Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms"</a></b> <br>
      <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2017/"> ACM International Conference on Measurement and Modeling of Computer Systems</a> (<b>SIGMETRICS</b>)</i>, Urbana-Champaign, IL, USA, June 2017.      <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2017/"> ACM International Conference on Measurement and Modeling of Computer Systems</a> (<b>SIGMETRICS</b>)</i>, Urbana-Champaign, IL, USA, June 2017.
-     <br>[<a href="pub/Voltron-reduced-voltage-DRAM-sigmetrics17-abstract.pdf">Abstract</a>] [<a href="pub/Voltron-reduced-voltage-DRAM-sigmetrics17-pomacs-onecolumn.pdf">POMACS Journal Version (same content, different format)</a>+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/Voltron-reduced-voltage-DRAM-sigmetrics17-abstract.pdf">Abstract</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/Voltron-reduced-voltage-DRAM-sigmetrics17-pomacs-onecolumn.pdf">POMACS Journal Version (same content, different format)</a>
-     <br>[<a href="pub/Voltron-reduced-voltage-DRAM-sigmetrics17-talk.pptx">Slides (pptx)</a> <a href="pub/Voltron-reduced-voltage-DRAM-sigmetrics17-talk.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/Voltron-reduced-voltage-DRAM-sigmetrics17-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/Voltron-reduced-voltage-DRAM-sigmetrics17-talk.pdf">(pdf)</a>]
      <br>[<a href="https://github.com/CMU-SAFARI/DRAM-Voltage-Study">Full Data Sets and Circuit Model</a>]      <br>[<a href="https://github.com/CMU-SAFARI/DRAM-Voltage-Study">Full Data Sets and Circuit Model</a>]
 </li> </li>
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 <p><li> <p><li>
      Jeremie S. Kim, Minesh Patel, Hasan Hassan, and <u>Onur Mutlu</u>,<br>      Jeremie S. Kim, Minesh Patel, Hasan Hassan, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/dram-latency-puf_hpca18.pdf">"The DRAM Latency PUF: Quickly Evaluating Physical Unclonable Functions by Exploiting the Latency-Reliability Tradeoff in Modern DRAM Devices"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18.pdf">"The DRAM Latency PUF: Quickly Evaluating Physical Unclonable Functions by Exploiting the Latency-Reliability Tradeoff in Modern DRAM Devices"</a></b> <br>
      <i>Proceedings of the <a href="https://hpca2018.ece.ucsb.edu/">24th International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Vienna, Austria, February 2018.            <i>Proceedings of the <a href="https://hpca2018.ece.ucsb.edu/">24th International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Vienna, Austria, February 2018.      
      <br>[<a href="https://www.youtube.com/watch?v=Xw0laEEDmsM&feature=youtu.be">Lightning Talk Video</a>]      <br>[<a href="https://www.youtube.com/watch?v=Xw0laEEDmsM&feature=youtu.be">Lightning Talk Video</a>]
-     <br>[<a href="pub/dram-latency-puf_hpca18_talk.pptx">Slides (pptx)</a> <a href="pub/dram-latency-puf_hpca18_talk.pdf">(pdf)</a>] [<a href="pub/dram-latency-puf_hpca18_lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="pub/dram-latency-puf_hpca18_lightning-talk.pdf">(pdf)</a>+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18_talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18_talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18_lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18_lightning-talk.pdf">(pdf)</a>
      <!--br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]-->      <!--br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]-->
 </li> </li>
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 <p><li> <p><li>
      Anup Das, Hasan Hassan, and <u>Onur Mutlu</u>,<br>      Anup Das, Hasan Hassan, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/VRL-DRAM_reduced-refresh-latency_dac18.pdf">"VRL-DRAM: Improving DRAM Performance via Variable Refresh Latency"</a></b><br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/VRL-DRAM_reduced-refresh-latency_dac18.pdf">"VRL-DRAM: Improving DRAM Performance via Variable Refresh Latency"</a></b><br>
      <i>Proceedings of the <a href="https://dac.com/">55th Design Automation Conference</a> (<b>DAC</b>)</i>, San Francisco, CA, USA, June 2018.      <i>Proceedings of the <a href="https://dac.com/">55th Design Automation Conference</a> (<b>DAC</b>)</i>, San Francisco, CA, USA, June 2018.
-     <br>[<a href="pub/VRL-DRAM_reduced-refresh-latency_dac18-talk.pdf">Slides (pdf)</a>] [<a href="pub/VRL-DRAM_reduced-refresh-latency_dac18-poster.pdf">Poster (pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/VRL-DRAM_reduced-refresh-latency_dac18-talk.pdf">Slides (pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/VRL-DRAM_reduced-refresh-latency_dac18-poster.pdf">Poster (pdf)</a>]
      </li>      </li>
  
Line 606: Line 606:
 <p><li> <p><li>
      Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, and <u>Onur Mutlu</u>,<br>      Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/tldram_hpca13.pdf">"Tiered-Latency DRAM: A Low Latency and Low Cost DRAM Architecture"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/tldram_hpca13.pdf">"Tiered-Latency DRAM: A Low Latency and Low Cost DRAM Architecture"</a></b> <br>
      <i>Proceedings of the <a href="http://www.cs.utah.edu/~lizhang/HPCA19/">19th International Symposium on High-Performance Computer       <i>Proceedings of the <a href="http://www.cs.utah.edu/~lizhang/HPCA19/">19th International Symposium on High-Performance Computer 
-     Architecture</a> (<b>HPCA</b>)</i>, Shenzhen, China, February 2013.      <a href="pub/lee_hpca13_talk.pptx">Slides (pptx)</a> +     Architecture</a> (<b>HPCA</b>)</i>, Shenzhen, China, February 2013.      <a href="https://people.inf.ethz.ch/omutlu/pub/lee_hpca13_talk.pptx">Slides (pptx)</a> 
 </li> </li>
  
 <p><li> <p><li>
      Kevin K. Chang, Prashant J. Nair, Saugata Ghose, Donghyuk Lee, Moinuddin K. Qureshi, and  <u>Onur Mutlu</u>,<br>      Kevin K. Chang, Prashant J. Nair, Saugata Ghose, Donghyuk Lee, Moinuddin K. Qureshi, and  <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/lisa-dram_hpca16.pdf">"Low-Cost Inter-Linked Subarrays (LISA): Enabling Fast Inter-Subarray Data Movement in DRAM"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/lisa-dram_hpca16.pdf">"Low-Cost Inter-Linked Subarrays (LISA): Enabling Fast Inter-Subarray Data Movement in DRAM"</a></b> <br>
      <i>Proceedings of the <a href="http://hpca22.site.ac.upc.edu/">22nd International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Barcelona, Spain, March 2016.        <i>Proceedings of the <a href="http://hpca22.site.ac.upc.edu/">22nd International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Barcelona, Spain, March 2016.  
-     <br>[<a href="pub/lisa-dram_kevinchang_hpca16-talk.pptx">Slides (pptx)</a> <a href="pub/lisa-dram_kevinchang_hpca16-talk.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/lisa-dram_kevinchang_hpca16-talk.pptx">Slides (pptx)</a> <a href="pub/lisa-dram_kevinchang_hpca16-talk.pdf">(pdf)</a>]
      <br>[<a href="https://github.com/CMU-SAFARI/RamulatorSharp">Source Code</a>]      <br>[<a href="https://github.com/CMU-SAFARI/RamulatorSharp">Source Code</a>]
 </li> </li>
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      Hasan Hassan, Gennady Pekhimenko, Nandita Vijaykumar, Vivek Seshadri, Donghyuk Lee, Oguz Ergin, and <u>Onur Mutlu</u>,<br>      Hasan Hassan, Gennady Pekhimenko, Nandita Vijaykumar, Vivek Seshadri, Donghyuk Lee, Oguz Ergin, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/chargecache_low-latency-dram_hpca16.pdf">"ChargeCache: Reducing DRAM Latency by Exploiting Row Access Locality"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/chargecache_low-latency-dram_hpca16.pdf">"ChargeCache: Reducing DRAM Latency by Exploiting Row Access Locality"</a></b> <br>
      <i>Proceedings of the <a href="http://hpca22.site.ac.upc.edu/">22nd International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Barcelona, Spain, March 2016.        <i>Proceedings of the <a href="http://hpca22.site.ac.upc.edu/">22nd International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Barcelona, Spain, March 2016.  
-     <br>[<a href="pub/chargecache_low-latency-dram_hhassan_hpca16-talk.pptx">Slides (pptx)</a> <a href="pub/chargecache_low-latency-dram_hhassan_hpca16-talk.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/chargecache_low-latency-dram_hhassan_hpca16-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/chargecache_low-latency-dram_hhassan_hpca16-talk.pdf">(pdf)</a>]
      <br>[<a href="https://github.com/CMU-SAFARI/RamulatorSharp">Source Code</a>]      <br>[<a href="https://github.com/CMU-SAFARI/RamulatorSharp">Source Code</a>]
 </li> </li>
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      Saugata Ghose, A. Giray Yaglikci, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, and <u>Onur Mutlu</u>,<br>      Saugata Ghose, A. Giray Yaglikci, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, and <u>Onur Mutlu</u>,<br>
-     <b><a href="pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18_pomacs18.pdf">"What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study"</a></b> <br>+     <b><a href="https://people.inf.ethz.ch/omutlu/pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18_pomacs18.pdf">"What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study"</a></b> <br>
      <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2018/"> ACM International Conference on Measurement and Modeling of Computer Systems</a> (<b>SIGMETRICS</b>)</i>, Irvine, CA, USA, June 2018.      <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2018/"> ACM International Conference on Measurement and Modeling of Computer Systems</a> (<b>SIGMETRICS</b>)</i>, Irvine, CA, USA, June 2018.
-     <br>[<a href="pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18-abstract.pdf">Abstract</a>]  +     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18-abstract.pdf">Abstract</a>]  
-     <!--[<a href="pub/Voltron-reduced-voltage-DRAM-sigmetrics17-pomacs-onecolumn.pdf">POMACS Journal Version (same content, different format)</a>]--> +     <!--[<a href="https://people.inf.ethz.ch/omutlu/pub/Voltron-reduced-voltage-DRAM-sigmetrics17-pomacs-onecolumn.pdf">POMACS Journal Version (same content, different format)</a>]--> 
-     <br>[<a href="pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18-talk.pptx">Slides (pptx)</a> <a href="pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18-talk.pdf">(pdf)</a>]+     <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18-talk.pdf">(pdf)</a>]
      <!--<br>[<a href="https://github.com/CMU-SAFARI/DRAM-Voltage-Study">Full Data Sets and Circuit Model</a>]-->      <!--<br>[<a href="https://github.com/CMU-SAFARI/DRAM-Voltage-Study">Full Data Sets and Circuit Model</a>]-->
 </li> </li>
extended_reading_list.1555840415.txt.gz · Last modified: 2019/04/21 09:53 by ewent