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start [2017/10/06 14:33] juanstart [2019/05/29 09:57] (current) – external edit 127.0.0.1
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-====== Computer Architecture – Fall 2017 (263-2210-00L) ====== +====== Memory Systems and Memory-Centric Computing Systems -- HiPEAC ACACES Summer School 2018 ======  
  
-Welcome to the wiki for Computer Architecture for Fall 2017 
  
 =====Course Information===== =====Course Information=====
 +This webpage hosts materials (both preliminary and final) for the Memory Systems course [[https://people.inf.ethz.ch/omutlu/|Onur Mutlu]] taught at the HiPEAC ACACES Summer School July 9-13, 2018.
  
-====Description==== +[[http://acaces.hipeac.net/2018/index.php?page=courseinfo&lecturer=mutlu|Link to course information at the HiPEAC ACACES Summer School 2018 webpage]] 
-Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation. +====Course Abstract==== 
- +The memory system is a fundamental performance and energy bottleneck in almost all computing systems. Recent system designapplication, and technology trends that require more capacitybandwidth, efficiency, and predictability out of the memory system make it an even more important system bottleneckAt the same time, DRAM and flash technologies are experiencing difficult technology scaling challenges that make the maintenance and enhancement of their capacity, energy efficiency, performance, and reliability significantly more costly with conventional techniques. In factrecent reliability issues with DRAMsuch as the RowHammer problem, are already threatening system security and predictabilityWe are at the challenging intersection where issues in memory reliability and performance are tightly coupled with not only system cost and energy efficiency but also system security.
-====Objective==== +
-We will learnfor examplehow to design the control and data path hardware for a MIPS-like processorhow to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems. +
- +
-====Content==== +
-The principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer (RT) implementation of a MIPS-like pipelined processor in System Verilog. In additionwe will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options. +
- +
-[[http://www.vvz.ethz.ch/Vorlesungsverzeichnis/lerneinheitPre.do;VvzSessionId=nkSkmWZj-qOchr5IIClb225xI4bdFNQfpIIutXRy2vcS0GXOq4Uu!-757818615?lerneinheitId=119244&semkez=2017W&lang=en|Course description page]] \\ +
-[[https://moodle-app2.let.ethz.ch/course/view.php?id=3818|Moodle]]+
  
-**Prerequisites:** Digitaltechnik+In this course, we first discuss major challenges facing modern memory systems (and the computing platforms we currently design around the memory system) in the presence of greatly increasing demand for data and its fast analysis. We then examine some promising research and design directions to overcome these challenges. We discuss at least three key topics in detail, focusing on both open problems and potential solution directions 
 +  - fundamental issues in memory reliability and security and how to enable fundamentally secure, reliable, safe architectures;  
 +  - enabling data-centric and hence fundamentally energy-efficient architectures that are capable of performing computation near data;  
 +  - reducing both latency and energy consumption by tackling the fixed-latency/energy mindset.
  
 +If time permits, we will also discuss research challenges and opportunities in enabling emerging NVM (non-volatile memory) technologies and scaling NAND flash memory and SSDs (solid state drives) into the future.
  
-=====Staff Information=====+==== Course Instructor ==== 
 +Prof. Onur Mutlu, [[omutlu@gmail.com]], [[https://people.inf.ethz.ch/omutlu/]]
  
-====Contact==== +=== Bio: === 
-  * **Mailing List**: <comparch@lists.inf.ethz.ch> (sent to instructor and TAs)+  
 +Onur Mutlu is a Professor of Computer Science at ETH ZurichHe is also a faculty member at Carnegie Mellon University, where he previously held the Strecker Early Career ProfessorshipHis current broader research interests are in computer architecture, systems, hardware security, and bioinformaticsA variety of techniques he, along with his group and collaborators, has invented over the years have influenced industry and have been employed in commercial microprocessors and memory/storage systems. He obtained his PhD and MS in ECE from the University of Texas at Austin and BS degrees in Computer Engineering and Psychology from the University of Michigan, Ann Arbor. He started the Computer Architecture Group at Microsoft Research (2006-2009), and held various product and research positions at Intel Corporation, Advanced Micro Devices, VMware, and Google. He received the inaugural IEEE Computer Society Young Computer Architect Award, the inaugural Intel Early Career Faculty Award, US National Science Foundation CAREER Award, Carnegie Mellon University Ladd Research Award, faculty partnership awards from various companies, and a healthy number of best paper or "Top Pick" paper recognitions at various computer systems, architecture, and hardware security venues. He is an ACM Fellow "for contributions to computer architecture research, especially in memory systems", IEEE Fellow for "contributions to computer architecture research and practice", and an elected member of the Academy of Europe (Academia Europaea). His computer architecture and digital circuit design course lectures and materials are freely available on YouTube, and his research group makes a wide variety of software and hardware artifacts freely available online. For more information, please see his webpage at [[https://people.inf.ethz.ch/omutlu/]].
  
-^ ^ Name ^ E-mail ^ Office ^ Phone ^ Office Hours ^ 
-| **Instructor** | [[https://people.inf.ethz.ch/omutlu/|Onur Mutlu]] | <onur.mutlu@inf.ethz.ch> | CAB F 74.2| +41 44 632 88 53| | 
-| **Teaching Assistant (PhD)** | [[https://www.systems.ethz.ch/people/hasan-hassan|Hasan Hassan]] | <hhasan@inf.ethz.ch> | CAB E 78| +41 44 632 85 52| Fri. 16.00-18.00 | 
-| **Teaching Assistant (PhD)** | [[|Mohammad Sadrosadati]] | <seyyedmohammad.sadrosadati@inf.ethz.ch> | CAB D 77| +41 44 632 09 86| Tue. 16.00-18.00 | 
-| **Teaching Assistant (PostDoc)** | [[https://www.inf.ethz.ch/personal/arash.tavakkol/|Arash Tavakkol]] | <arash.tavakkol@inf.ethz.ch> | CAB D 77| +41 44 632 35 77| Wed. 16.00-18.00 | 
-| **Teaching Assistant (PostDoc)** | [[|Lois Orosa]] | <lois.orosa@inf.ethz.ch> | CAB D 77| +41 44 632 60 76| Thu. 16.00-18.00 | 
-| **Teaching Assistant (PostDoc)** | [[https://www.systems.ethz.ch/people/gómez-luna-juan/|Juan Gomez Luna]] | <juan.gomez@inf.ethz.ch> | CAB D 77| +41 44 632 60 76| Mon. 16.00-18.00 | 
-| **Admin. Assistant** | [[https://www.systems.ethz.ch/people/simonetta-zysset|Simonetta Zysset]] | <simonetta.zysset@inf.ethz.ch> | CAB F 78| +41 44 632 68 79|  --  | 
start.1507300390.txt.gz · Last modified: 2019/02/12 16:35 (external edit)