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Final Review Assignments

Required Readings and Recommended/Optional Readings:
Summary slides: (PDF)(PPT)

Required Readings

  • Onur Mutlu and Jeremie Kim,
    "RowHammer: A Retrospective"
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) Special Issue on Top Picks in Hardware and Embedded Security, 2019.
    [Preliminary arXiv version]
  • Onur Mutlu, Saugata Ghose, Juan Gomez-Luna, and Rachata Ausavarungnirun,
    "Processing Data Where It Makes Sense: Enabling In-Memory Computation"
    Invited paper in Microprocessors and Microsystems (MICPRO), June 2019.
    [arXiv version]
    [Slides (pptx)]
    [Talk Video]
  • Onur Mutlu and Lavanya Subramanian,
    "Research Problems and Opportunities in Memory Systems"
    Invited Article in Supercomputing Frontiers and Innovations (SUPERFRI), 2014.
  • Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie Kim, Michael A. Kozuch, Onur Mutlu, Phillip B. Gibbons, and Todd C. Mowry,
    "Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology"
    Proceedings of the 50th International Symposium on Microarchitecture (MICRO), Boston, MA, USA, October 2017.
    [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]
  • Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, Onur Mutlu, and Kiyoung Choi,
    "A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing"
    Proceedings of the 42nd International Symposium on Computer Architecture (ISCA), Portland, OR, June 2015.
    [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]
    Top Picks Honorable Mention by IEEE Micro.
  • Jamie Liu, Ben Jaiyen, Richard Veras, and Onur Mutlu,
    "RAIDR: Retention-Aware Intelligent DRAM Refresh"
    Proceedings of the 39th International Symposium on Computer Architecture (ISCA), Portland, OR, June 2012. Slides (pdf)
  • Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, and Onur Mutlu,
    "Tiered-Latency DRAM: A Low Latency and Low Cost DRAM Architecture"
    Proceedings of the 19th International Symposium on High-Performance Computer Architecture (HPCA), Shenzhen, China, February 2013. Slides (pptx)
  • Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger,
    "Architecting Phase Change Memory as a Scalable DRAM Alternative"
    Proceedings of the 36th International Symposium on Computer Architecture (ISCA), pages 2-13, Austin, TX, June 2009. Slides (pdf)
    One of the 13 computer architecture papers of 2009 selected as Top Picks by IEEE Micro.
    Selected as a CACM Research Highlight.
  • Nandita Vijaykumar, Abhilasha Jain, Diptesh Majumdar, Kevin Hsieh, Gennady Pekhimenko, Eiman Ebrahimi, Nastaran Hajinazar, Phillip B. Gibbons and Onur Mutlu,
    "A Case for Richer Cross-layer Abstractions: Bridging the Semantic Gap with Expressive Memory"
    Proceedings of the 45th International Symposium on Computer Architecture (ISCA), Los Angeles, CA, USA, June 2018.
    [Slides (pptx) (pdf)] [Lightning Talk Slides (pptx) (pdf)]
    [Lightning Talk Video]
  • Jeremie S. Kim, Minesh Patel, Hasan Hassan, Lois Orosa, and Onur Mutlu,
    "D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput"
    Proceedings of the 25th International Symposium on High-Performance Computer Architecture (HPCA), Washington, DC, USA, February 2019.
    [Slides (pptx) (pdf)]
    [Full Talk Video (21 minutes)]
  • Recommended Readings

  • Junwhan Ahn, Sungjoo Yoo, Onur Mutlu, and Kiyoung Choi,
    "PIM-Enabled Instructions: A Low-Overhead, Locality-Aware Processing-in-Memory Architecture"
    Proceedings of the 42nd International Symposium on Computer Architecture (ISCA), Portland, OR, June 2015.
    [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]
  • Amirali Boroumand, Saugata Ghose, Youngsok Kim, Rachata Ausavarungnirun, Eric Shiu, Rahul Thakur, Daehyun Kim, Aki Kuusela, Allan Knies, Parthasarathy Ranganathan, and Onur Mutlu,
    "Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks"
    Proceedings of the 23rd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Williamsburg, VA, USA, March 2018.
    [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]
    [Lightning Talk Video (2 minutes)]
    [Full Talk Video (21 minutes)]
  • Vivek Seshadri and Onur Mutlu,
    "In-DRAM Bulk Bitwise Execution Engine"
    Invited Book Chapter in Advances in Computers, to appear in 2020.
    [Preliminary arXiv version]
  • Yoongu Kim, Ross Daly, Jeremie Kim, Chris Fallin, Ji Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, and Onur Mutlu,
    "Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors"
    Proceedings of the 41st International Symposium on Computer Architecture (ISCA), Minneapolis, MN, June 2014.
    [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Source Code and Data] [RowHammer Summary Slides (pptx)] [RowHammer Summary]
    [Coverage on ZDNet 1] [Coverage on ZDNet 2] [MemTest86 Hammer Test] [RowHammer Discussion Group] [Discussion on Twitter]
    One of the 7 papers of 2012-2017 selected as Top Picks in Hardware and Embedded Security for IEEE TCAD (link).
  • Engin Ipek, Onur Mutlu, José F. Martínez, and Rich Caruana,
    "Self Optimizing Memory Controllers: A Reinforcement Learning Approach"
    Proceedings of the 35th International Symposium on Computer Architecture (ISCA), pages 39-50, Beijing, China, June 2008. Slides (pptx)
  • Thomas Moscibroda and Onur Mutlu,
    "Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems"
    Proceedings of the 16th USENIX Security Symposium (USENIX SECURITY), pages 257-274, Boston, MA, August 2007. Slides (ppt)
  • Onur Mutlu and Thomas Moscibroda,
    "Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems"
    Proceedings of the 35th International Symposium on Computer Architecture (ISCA), pages 63-74, Beijing, China, June 2008. [Summary] [Slides (ppt)]
    One of the 12 computer architecture papers of 2008 selected as Top Picks by IEEE Micro.
  • Yu Cai, Saugata Ghose, Erich F. Haratsch, Yixin Luo, and Onur Mutlu,
    "Error Characterization, Mitigation, and Recovery in Flash Memory Based Solid State Drives"
    Proceedings of the IEEE, 2017.
    [Preliminary arxiv.org version]
  • Yoongu Kim, Weikun Yang, and Onur Mutlu,
    "Ramulator: A Fast and Extensible DRAM Simulator"
    IEEE Computer Architecture Letters (CAL), March 2015.
    [Source Code]
  • Jamie Liu, Ben Jaiyen, Yoongu Kim, Chris Wilkerson, and Onur Mutlu,
    "An Experimental Study of Data Retention Behavior in Modern DRAM Devices: Implications for Retention Time Profiling Mechanisms"
    Proceedings of the 40th International Symposium on Computer Architecture (ISCA), Tel-Aviv, Israel, June 2013. Slides (ppt) Slides (pdf)
  • Minesh Patel, Jeremie S. Kim, and Onur Mutlu,
    "The Reach Profiler (REAPER): Enabling the Mitigation of DRAM Retention Failures via Profiling at Aggressive Conditions"
    Proceedings of the 44th International Symposium on Computer Architecture (ISCA), Toronto, Canada, June 2017.
    [Slides (pptx) (pdf)]
    [Lightning Session Slides (pptx) (pdf)]
  • Jeremie S. Kim, Minesh Patel, Hasan Hassan, and Onur Mutlu,
    "The DRAM Latency PUF: Quickly Evaluating Physical Unclonable Functions by Exploiting the Latency-Reliability Tradeoff in Modern DRAM Devices"
    Proceedings of the 24th International Symposium on High-Performance Computer Architecture (HPCA), Vienna, Austria, February 2018.
    [Lightning Talk Video]
    [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]
  • Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, and Onur Mutlu,
    "A Case for Exploiting Subarray-Level Parallelism (SALP) in DRAM"
    Proceedings of the 39th International Symposium on Computer Architecture (ISCA), Portland, OR, June 2012. Slides (pptx)
  • Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Khan, Vivek Seshadri, Kevin Chang, and Onur Mutlu,
    "Adaptive-Latency DRAM: Optimizing DRAM Timing for the Common-Case"
    Proceedings of the 21st International Symposium on High-Performance Computer Architecture (HPCA), Bay Area, CA, February 2015.
    [Slides (pptx) (pdf)] [Full data sets]
  • Kevin Chang, Abhijith Kashyap, Hasan Hassan, Samira Khan, Kevin Hsieh, Donghyuk Lee, Saugata Ghose, Gennady Pekhimenko, Tianshi Li, and Onur Mutlu,
    "Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization"
    Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Antibes Juan-Les-Pins, France, June 2016.
    [Slides (pptx) (pdf)]
    [Source Code]
  • Saugata Ghose, A. Giray Yaglikci, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, and Onur Mutlu,
    "What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study"
    Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Irvine, CA, USA, June 2018.
    [Abstract]
    [POMACS Journal Version (same content, different format)]
    [Slides (pptx) (pdf)]
    [VAMPIRE DRAM Power Model]
  • Nandita Vijaykumar, Eiman Ebrahimi, Kevin Hsieh, Phillip B. Gibbons and Onur Mutlu,
    "The Locality Descriptor: A Holistic Cross-Layer Abstraction to Express Data Locality in GPUs"
    Proceedings of the 45th International Symposium on Computer Architecture (ISCA), Los Angeles, CA, USA, June 2018.
    [Slides (pptx) (pdf)] [Lightning Talk Slides (pptx) (pdf)]
    [Lightning Talk Video]
  • Lavanya Subramanian, Vivek Seshadri, Yoongu Kim, Ben Jaiyen, and Onur Mutlu,
    "MISE: Providing Performance Predictability and Improving Fairness in Shared Main Memory Systems"
    Proceedings of the 19th International Symposium on High-Performance Computer Architecture (HPCA), Shenzhen, China, February 2013. Slides (pptx)
  • Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, and Yale N. Patt,
    "Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems"
    ACM Transactions on Computer Systems (TOCS), April 2012.
    A previous version as HPS Technical Report, TR-HPS-2012-001, February 2012.
  • Sai Prashanth Muralidhara, Lavanya Subramanian, Onur Mutlu, Mahmut Kandemir, and Thomas Moscibroda,
    "Reducing Memory Interference in Multicore Systems via Application-Aware Memory Channel Partitioning"
    Proceedings of the 44th International Symposium on Microarchitecture (MICRO), Porto Alegre, Brazil, December 2011. Slides (pptx)

  • Hasan Hassan, Minesh Patel, Jeremie S. Kim, A. Giray Yaglikci, Nandita Vijaykumar, Nika Mansourighiasi, Saugata Ghose, and Onur Mutlu,
    "CROW: A Low-Cost Substrate for Improving DRAM Performance, Energy Efficiency, and Reliability"
    Proceedings of the 46th International Symposium on Computer Architecture (ISCA), Phoenix, AZ, USA, June 2019.
    [Lightning Talk Slides (pptx) (pdf)]
    [Lightning Talk Video]
  • Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, and Onur Mutlu,
    "BLISS: Balancing Performance, Fairness and Complexity in Memory Access Scheduling"
    IEEE Transactions on Parallel and Distributed Systems (TPDS), to appear in 2016.
  • arXiv.org version, April 2015.
    An earlier version as SAFARI Technical Report, TR-SAFARI-2015-004, Carnegie Mellon University, March 2015.
    [Source Code]

  • Onur Mutlu,
    "Efficient Runahead Execution Processors"
    Ph.D. Dissertation, HPS Technical Report, TR-HPS-2006-007, July 2006. Slides (ppt)
    Nominated for the ACM Doctoral Dissertation Award by the University of Texas at Austin.
  • HanBin Yoon, Justin Meza, Rachata Ausavarungnirun, Rachael Harding, and Onur Mutlu,
    "Row Buffer Locality Aware Caching Policies for Hybrid Memories"
    Proceedings of the 30th IEEE International Conference on Computer Design (ICCD), Montreal, Quebec, Canada, September 2012. Slides (pptx) (pdf)
    Best paper award (in Computer Systems and Applications track).
  • Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Onur Mutlu, and Srinivas Devadas,
    "Banshee: Bandwidth-Efficient DRAM Caching via Software/Hardware Cooperation"
    Proceedings of the 50th International Symposium on Microarchitecture (MICRO), Boston, MA, USA, October 2017.
    [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]
    [Source Code]
  • Justin Meza, Yixin Luo, Samira Khan, Jishen Zhao, Yuan Xie, and Onur Mutlu,
    "A Case for Efficient Hardware-Software Cooperative Management of Storage and Memory"
    Proceedings of the 5th Workshop on Energy-Efficient Design (WEED), Tel-Aviv, Israel, June 2013. Slides (pptx) Slides (pdf)
  • Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, and Onur Mutlu,
    "CoNDA: Efficient Cache Coherence Support for Near-Data Accelerators"
    Proceedings of the 46th International Symposium on Computer Architecture (ISCA), Phoenix, AZ, USA, June 2019.
    [Lightning Talk Slides (pptx) (pdf)]
    [Lightning Talk Video]
  • Yixin Luo, Sriram Govindan, Bikash Sharma, Mark Santaniello, Justin Meza, Aman Kansal, Jie Liu, Badriddine Khessib, Kushagra Vaid, and Onur Mutlu,
    "Characterizing Application Memory Error Vulnerability to Optimize Data Center Cost via Heterogeneous-Reliability Memory"
    Proceedings of the 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Atlanta, GA, June 2014. [Summary] [Slides (pptx) (pdf)] [Coverage on ZDNet]

  • Justin Meza, Qiang Wu, Sanjeev Kumar, and Onur Mutlu,
    "A Large-Scale Study of Flash Memory Errors in the Field"
    Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Portland, OR, June 2015.
    [Slides (pptx) (pdf)] [Coverage at ZDNet] [Coverage on The Register] [Coverage on TechSpot] [Coverage on The Tech Report]
  • Benjamin C. Lee, Ping Zhou, Jun Yang, Youtao Zhang, Bo Zhao, Engin Ipek, Onur Mutlu, and Doug Burger,
    "Phase Change Technology and the Future of Main Memory"
    IEEE Micro, Special Issue: Micro's Top Picks from 2009 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 30, No. 1, pages 60-70, January/February 2010.
  • Kevin K. Chang, Prashant J. Nair, Saugata Ghose, Donghyuk Lee, Moinuddin K. Qureshi, and Onur Mutlu,
    "Low-Cost Inter-Linked Subarrays (LISA): Enabling Fast Inter-Subarray Data Movement in DRAM"
    Proceedings of the 22nd International Symposium on High-Performance Computer Architecture (HPCA), Barcelona, Spain, March 2016.
    [Slides (pptx) (pdf)]
    [Source Code]
  • readings.txt · Last modified: 2019/07/10 14:47 (external edit)