readings
Table of Contents
Final Review Assignments
Required Readings
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<u>Onur Mutlu</u> and Jeremie Kim,<br> <b><!--a href="https://people.inf.ethz.ch/omutlu/pub/ProcessingDataWhereItMakesSense_micpro19-invited.pdf"-->"RowHammer: A Retrospective"</a></b></br> <i><a href="https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43">IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</a> (<b>TCAD</b>) Special Issue on Top Picks in Hardware and Embedded Security</i>, 2019. <br>[<a href="https://arxiv.org/pdf/1904.09724.pdf">Preliminary arXiv version</a>]
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<u>Onur Mutlu</u>, Saugata Ghose, Juan Gomez-Luna, and Rachata Ausavarungnirun,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/ProcessingDataWhereItMakesSense_micpro19-invited.pdf">"Processing Data Where It Makes Sense: Enabling In-Memory Computation"</a></b></br> <i>Invited paper in <a href="https://doi.org/10.1016/j.micpro.2019.01.009">Microprocessors and Microsystems</a> (<b>MICPRO</b>)</i>, June 2019. <br>[<a href="https://arxiv.org/pdf/1903.03988.pdf">arXiv version</a>] <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/onur-GLSVLSI-KeynoteTalk-EnablingInMemoryComputation-May-10-2019-unrolled.pptx">Slides (pptx)</a><!--a href="https://people.inf.ethz.ch/omutlu/pub/onur-AcceleratingGenomeAnalysis-HiCOMB-Keynote-May-21-2018.pdf">(pdf)</a-->] <br>[<a href="https://www.youtube.com/watch?v=hPnSmfwu2-A">Talk Video</a>]
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<u>Onur Mutlu</u> and Lavanya Subramanian,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/memory-systems-research_superfri14.pdf">"Research Problems and Opportunities in Memory Systems"</a></b><br> <i>Invited Article in <a href="http://superfri.org/superfri">Supercomputing Frontiers and Innovations</a> (<b>SUPERFRI</b>)</i>, 2014. <!--br><i>Please email me for the final copy.</i--> </li>
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Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie Kim, Michael A. Kozuch, <u>Onur Mutlu</u>, Phillip B. Gibbons, and Todd C. Mowry,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17.pdf"> "Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology"</a></b><br> <i>Proceedings of the <a href="http://www.microarch.org/micro50/">50th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Boston, MA, USA, October 2017. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-lightning-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-poster.pptx">Poster (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/ambit-bulk-bitwise-dram_micro17-poster.pdf">(pdf)</a>] <!--br>[<a href="https://github.com/CMU-SAFARI/ASMSim">Source Code</a>]--> <br> </li>
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Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, <u>Onur Mutlu</u>, and Kiyoung Choi,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15.pdf">"A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing"</a></b><br> <i>Proceedings of the <a href="http://www.ece.cmu.edu/calcm/isca2015/">42nd International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Portland, OR, June 2015. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/tesseract-pim-architecture-for-graph-processing_isca15-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15-lightning-talk.pdf">(pdf)</a>] <br><b><i><font color="red"'>Top Picks Honorable Mention by IEEE Micro.</font></i></b> <!-- [<a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_talk_isca14.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_talk_isca14.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_lightning-talk_isca14.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_lightning-talk_isca14.pdf">(pdf)</a>] --> <br></li> <p><li> Jamie Liu, Ben Jaiyen, Richard Veras, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/raidr-dram-refresh_isca12.pdf">"RAIDR: Retention-Aware Intelligent DRAM Refresh"</a></b><br> <i>Proceedings of the <a href="http://isca2012.ittc.ku.edu/">39th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Portland, OR, June 2012. <a href="https://people.inf.ethz.ch/omutlu/pub/liu_isca12_talk.pdf">Slides (pdf)</a> <br> </li>
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Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/tldram_hpca13.pdf">"Tiered-Latency DRAM: A Low Latency and Low Cost DRAM Architecture"</a></b> <br> <i>Proceedings of the <a href="http://www.cs.utah.edu/~lizhang/HPCA19/">19th International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Shenzhen, China, February 2013. <a href="https://people.inf.ethz.ch/omutlu/pub/lee_hpca13_talk.pptx">Slides (pptx)</a>
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>Benjamin C. Lee, Engin Ipek, <u>Onur Mutlu</u>, and Doug Burger,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/pcm_isca09.pdf">"Architecting Phase Change Memory as a Scalable DRAM Alternative"</a></b><br> <i>Proceedings of the <a href="http://isca09.cs.columbia.edu/">36th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, pages 2-13, Austin, TX, June 2009. <a href="https://people.inf.ethz.ch/omutlu/pub/lee_isca09_talk.pdf">Slides (pdf)</a> <br> <b><i><font color="red"'>One of the 13 computer architecture papers of 2009 selected as Top Picks by IEEE Micro. <br>Selected as a CACM Research Highlight.</font></i></b> </li>
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Nandita Vijaykumar, Abhilasha Jain, Diptesh Majumdar, Kevin Hsieh, Gennady Pekhimenko, Eiman Ebrahimi, Nastaran Hajinazar, Phillip B. Gibbons and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/X-MEM_Expressive-Memory-for-Rich-Cross-Layer-Abstractions_isca18.pdf">"A Case for Richer Cross-layer Abstractions: Bridging the Semantic Gap with Expressive Memory"</a></b><br> <i>Proceedings of the <a href="http://iscaconf.org/isca2018/">45th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Los Angeles, CA, USA, June 2018. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/X-MEM_Expressive-Memory-for-Rich-Cross-Layer-Abstractions_isca18-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/X-MEM_Expressive-Memory-for-Rich-Cross-Layer-Abstractions_isca18-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/X-MEM_Expressive-Memory-for-Rich-Cross-Layer-Abstractions_isca18-lightning-talk.pptx">Lightning Talk Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/X-MEM_Expressive-Memory-for-Rich-Cross-Layer-Abstractions_isca18-lightning-talk.pdf">(pdf)</a>] <br>[<a href="https://youtu.be/hasM-p7Ag_g">Lightning Talk Video</a>] <br></li>
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Jeremie S. Kim, Minesh Patel, Hasan Hassan, Lois Orosa, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/drange-dram-latency-based-true-random-number-generator_hpca19.pdf">"D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput"</a></b> <br> <i>Proceedings of the <a href="http://hpca2019.seas.gwu.edu/">25th International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Washington, DC, USA, February 2019. <!--br>[<a href="https://www.youtube.com/watch?v=Xw0laEEDmsM&feature=youtu.be">Lightning Talk Video</a>--> <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/drange-dram-latency-based-true-random-number-generator_hpca19-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/drange-dram-latency-based-true-random-number-generator_hpca19-talk.pdf">(pdf)</a>] <!--[<a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18_lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18_lightning-talk.pdf">(pdf)</a>] --> <br>[<a href="https://www.youtube.com/watch?v=g_GtYdzIPK4&list=PL5Q2soXY2Zi8_VVChACnON4sfh2bJ5IrD&index=19">Full Talk Video</a> (21 minutes)] <!--br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]-->
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Recommended Readings
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Junwhan Ahn, Sungjoo Yoo, <u>Onur Mutlu</u>, and Kiyoung Choi,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/pim-enabled-instructons-for-low-overhead-pim_isca15.pdf">"PIM-Enabled Instructions: A Low-Overhead, Locality-Aware Processing-in-Memory Architecture"</a></b><br> <i>Proceedings of the <a href="http://www.ece.cmu.edu/calcm/isca2015/">42nd International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Portland, OR, June 2015. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/pim-enabled-instructons-for-low-overhead-pim_isca15-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/pim-enabled-instructons-for-low-overhead-pim_isca15-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/pim-enabled-instructons-for-low-overhead-pim_isca15-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/pim-enabled-instructons-for-low-overhead-pim_isca15-lightning-talk.pdf">(pdf)</a>] <!-- [<a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_talk_isca14.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_talk_isca14.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_lightning-talk_isca14.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dirty-block-index_seshadri_lightning-talk_isca14.pdf">(pdf)</a>] --> <br></li> <p><li> Amirali Boroumand, Saugata Ghose, Youngsok Kim, Rachata Ausavarungnirun, Eric Shiu, Rahul Thakur, Daehyun Kim, Aki Kuusela, Allan Knies, Parthasarathy Ranganathan, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18.pdf">"Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks"</a></b> <br> <i>Proceedings of the <a href="https://www.asplos2018.org/">23rd International Conference on Architectural Support for Programming Languages and Operating Systems</a> (<b>ASPLOS</b>)</i>, Williamsburg, VA, USA, March 2018. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-lightning-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-poster.pptx">Poster (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/Google-consumer-workloads-data-movement-and-PIM_asplos18-poster.pdf">(pdf)</a>] <!--br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]--> <br>[<a href="https://www.youtube.com/watch?v=pklgnQ3ejZ4">Lightning Talk Video</a> (2 minutes)] <br>[<a href="https://www.youtube.com/watch?v=OTB_72HYIn0">Full Talk Video</a> (21 minutes)]
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Vivek Seshadri and <u>Onur Mutlu</u>,<br> <b><a href="https://arxiv.org/pdf/1905.09822.pdf">"In-DRAM Bulk Bitwise Execution Engine"</a></b> <br> <i>Invited Book Chapter in <!--a href="https://doi.org/10.1016/bs.adcom.2017.04.004"-->Advances in Computers</a></i>, to appear in 2020. <br>[<a href="https://arxiv.org/pdf/1905.09822.pdf">Preliminary arXiv version</a>] <!--br>[<a href="https://people.inf.ethz.ch/omutlu/pub/onur-Rowhammer-Memory-Security_date17-invited-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/onur-Rowhammer-Memory-Security_date17-invited-talk.pdf">(pdf)</a>]--> </li>
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Yoongu Kim, Ross Daly, Jeremie Kim, Chris Fallin, Ji Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/dram-row-hammer_isca14.pdf"-->"Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors"</a></b><br> <i>Proceedings of the <a href="http://cag.engr.uconn.edu/isca2014/">41st International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Minneapolis, MN, June 2014. <br> [<a href="https://people.inf.ethz.ch/omutlu/pub/dram-row-hammer_kim_talk_isca14.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dram-row-hammer_kim_talk_isca14.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/dram-row-hammer_kim_lightning-talk_isca14.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dram-row-hammer_kim_lightning-talk_isca14.pdf">(pdf)</a>] [<a href="https://github.com/CMU-SAFARI/rowhammer">Source Code and Data</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/rowhammer.pptx">RowHammer Summary Slides (pptx)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/rowhammer-summary.pdf">RowHammer Summary</a>] <br> [<a href="http://www.zdnet.com/article/flipping-dram-bits-maliciously/">Coverage on ZDNet 1</a>] [<a href="http://www.zdnet.com/article/rowhammer-dram-flaw-could-be-widespread-says-google/">Coverage on ZDNet 2</a>] [<a href="http://www.memtest86.com/troubleshooting.htm">MemTest86 Hammer Test</a>] [<a href="https://groups.google.com/forum/#!forum/rowhammer-discuss">RowHammer Discussion Group</a>] [<a href="https://twitter.com/hashtag/rowhammer?f=realtime">Discussion on Twitter</a>] <br><b><i><font color="red"'>One of the 7 papers of 2012-2017 selected as Top Picks in Hardware and Embedded Security for IEEE TCAD (<a href="https://wp.nyu.edu/toppicksinhardwaresecurity/">link</a>).</font></i></b> <br> </li>
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>Engin Ipek, <u>Onur Mutlu</u>, José F. Martínez, and Rich Caruana, <br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/rlmc_isca08.pdf">"Self Optimizing Memory Controllers: A Reinforcement Learning Approach"</a></b><br> <i>Proceedings of the <a href="http://isca2008.cs.princeton.edu/">35th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, pages 39-50, Beijing, China, June 2008. <a href="https://people.inf.ethz.ch/omutlu/pub/ipek_isca08_talk.pptx">Slides (pptx)</a> </li>
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>Thomas Moscibroda and <u>Onur Mutlu</u>, <br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/mph_usenix_security07.pdf">"Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems"</a></b> <br> <i>Proceedings of the <a href="http://www.usenix.org/events/sec07/">16th USENIX Security Symposium</a> (<b>USENIX SECURITY</b>)</i>, pages 257-274, Boston, MA, August 2007. <a href="https://people.inf.ethz.ch/omutlu/pub/mutlu_usenix-security07_talk.ppt">Slides (ppt)</a> </li>
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><u>Onur Mutlu</u> and Thomas Moscibroda, <br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/parbs_isca08.pdf">"Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems"</a></b><br> <i>Proceedings of the <a href="http://isca2008.cs.princeton.edu/">35th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, pages 63-74, Beijing, China, June 2008. [<a href="https://people.inf.ethz.ch/omutlu/pub/parbs_isca08-summary.pdf">Summary</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/mutlu_isca08_talk.ppt">Slides (ppt)</a>]<br> <b><i><font color="red"'>One of the 12 computer architecture papers of 2008 selected as Top Picks by IEEE Micro.</font></i></b> </li>
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Yu Cai, Saugata Ghose, Erich F. Haratsch, Yixin Luo, and <u>Onur Mutlu</u>,<br> <b><a href="https://arxiv.org/pdf/1706.08642.pdf">"Error Characterization, Mitigation, and Recovery in Flash Memory Based Solid State Drives"</a></b><br> <i><a href="http://proceedingsoftheieee.ieee.org/">Proceedings of the IEEE</a></i>, 2017. <!--br>[<a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-talk.pdf">(pdf)</a>] --> <!--br>[<a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/TOM-programmer-transparent-GPU-near-data-processing_kevinhsieh_isca16-lightning-talk.pdf">(pdf)</a>] --> <br>[<a href="https://arxiv.org/pdf/1706.08642.pdf">Preliminary arxiv.org version</a>] <br></li>
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Yoongu Kim, Weikun Yang, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf">"Ramulator: A Fast and Extensible DRAM Simulator"</a></b><br> <i><a href="http://www.computer.org/web/cal">IEEE Computer Architecture Letters</a> (<b>CAL</b>)</i>, March 2015. <br>[<a href="https://github.com/CMU-SAFARI/ramulator">Source Code</a>] </li>
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Jamie Liu, Ben Jaiyen, Yoongu Kim, Chris Wilkerson, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/dram-retention-time-characterization_isca13.pdf">"An Experimental Study of Data Retention Behavior in Modern DRAM Devices: Implications for Retention Time Profiling Mechanisms"</a></b><br> <i>Proceedings of the <a href="http://isca2013.eew.technion.ac.il/">40th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Tel-Aviv, Israel, June 2013. <a href="https://people.inf.ethz.ch/omutlu/pub/mutlu_isca13_talk.ppt">Slides (ppt)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/mutlu_isca13_talk.pdf">Slides (pdf)</a> <br> </li>
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Minesh Patel, Jeremie S. Kim, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/reaper-dram-retention-profiling-lpddr4_isca17.pdf">"The Reach Profiler (REAPER): Enabling the Mitigation of DRAM Retention Failures via Profiling at Aggressive Conditions"</a></b><br> <i>Proceedings of the <a href="http://isca17.ece.utoronto.ca/doku.php">44th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Toronto, Canada, June 2017. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/reaper-dram-retention-profiling-lpddr4_isca17-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/reaper-dram-retention-profiling-lpddr4_isca17-talk.pdf">(pdf)</a>] <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/reaper-dram-retention-profiling-lpddr4_isca17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/reaper-dram-retention-profiling-lpddr4_isca17-lightning-talk.pdf">(pdf)</a>] <br></li>
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Jeremie S. Kim, Minesh Patel, Hasan Hassan, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18.pdf">"The DRAM Latency PUF: Quickly Evaluating Physical Unclonable Functions by Exploiting the Latency-Reliability Tradeoff in Modern DRAM Devices"</a></b> <br> <i>Proceedings of the <a href="https://hpca2018.ece.ucsb.edu/">24th International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Vienna, Austria, February 2018. <br>[<a href="https://www.youtube.com/watch?v=Xw0laEEDmsM&feature=youtu.be">Lightning Talk Video</a>] <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18_talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18_talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18_lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/dram-latency-puf_hpca18_lightning-talk.pdf">(pdf)</a>] <!--br>[<a href="https://github.com/CMU-SAFARI/SoftMC">Source Code</a>]-->
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<p><li>
Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/salp-dram_isca12.pdf">"A Case for Exploiting Subarray-Level Parallelism (SALP) in DRAM"</a></b><br> <i>Proceedings of the <a href="http://isca2012.ittc.ku.edu/">39th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Portland, OR, June 2012. <a href="https://people.inf.ethz.ch/omutlu/pub/kim_isca12_talk.pptx">Slides (pptx)</a> <br> </li> <p><li> Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Khan, Vivek Seshadri, Kevin Chang, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/adaptive-latency-dram_hpca15.pdf">"Adaptive-Latency DRAM: Optimizing DRAM Timing for the Common-Case"</a></b> <br> <i>Proceedings of the <a href="http://darksilicon.org/hpca/">21st International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Bay Area, CA, February 2015. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/adaptive-latency-dram_donghyuk_hpca15-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/adaptive-latency-dram_donghyuk_hpca15-talk.pdf">(pdf)</a>] [<a href="http://www.ece.cmu.edu/~safari/tools/aldram-hpca2015-fulldata.html">Full data sets</a>]
</li>
<p><li>
Kevin Chang, Abhijith Kashyap, Hasan Hassan, Samira Khan, Kevin Hsieh, Donghyuk Lee, Saugata Ghose, Gennady Pekhimenko, Tianshi Li, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/understanding-latency-variation-in-DRAM-chips_sigmetrics16.pdf">"Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization"</a></b> <br> <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2016/"> ACM International Conference on Measurement and Modeling of Computer Systems</a> (<b>SIGMETRICS</b>)</i>, Antibes Juan-Les-Pins, France, June 2016. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/understanding-latency-variation-in-DRAM-chips_kevinchang_sigmetrics16-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/understanding-latency-variation-in-DRAM-chips_kevinchang_sigmetrics16-talk.pdf">(pdf)</a>] <br>[<a href="https://github.com/CMU-SAFARI/DRAM-Latency-Variation-Study">Source Code</a>]
</li>
<p><li>
Saugata Ghose, A. Giray Yaglikci, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18_pomacs18-twocolumn.pdf">"What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study"</a></b> <br> <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2018/"> ACM International Conference on Measurement and Modeling of Computer Systems</a> (<b>SIGMETRICS</b>)</i>, Irvine, CA, USA, June 2018. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18-abstract.pdf">Abstract</a>] <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18_pomacs18.pdf">POMACS Journal Version (same content, different format)</a>] <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18-talk.pdf">(pdf)</a>] <br>[<a href="https://github.com/CMU-SAFARI/VAMPIRE">VAMPIRE DRAM Power Model</a>]
</li>
<p><li>
Nandita Vijaykumar, Eiman Ebrahimi, Kevin Hsieh, Phillip B. Gibbons and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/LocalityDescriptor-Cross-Layer-GPU-Data-Locality-Abstraction_isca18.pdf">"The Locality Descriptor: A Holistic Cross-Layer Abstraction to Express Data Locality in GPUs"</a></b><br> <i>Proceedings of the <a href="http://iscaconf.org/isca2018/">45th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Los Angeles, CA, USA, June 2018. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/LocalityDescriptor-Cross-Layer-GPU-Data-Locality-Abstraction_isca18-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/LocalityDescriptor-Cross-Layer-GPU-Data-Locality-Abstraction_isca18-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/LocalityDescriptor-Cross-Layer-GPU-Data-Locality-Abstraction_isca18-lightning-talk.pptx">Lightning Talk Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/LocalityDescriptor-Cross-Layer-GPU-Data-Locality-Abstraction_isca18-lightning-talk.pdf">(pdf)</a>] <br>[<a href="https://youtu.be/M_0qvO97_hM">Lightning Talk Video</a>] <br></li>
<p><li>
Lavanya Subramanian, Vivek Seshadri, Yoongu Kim, Ben Jaiyen, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/mise-predictable_memory_performance-hpca13.pdf"-->"MISE: Providing Performance Predictability and Improving Fairness in Shared Main Memory Systems"</a></b> <br> <i>Proceedings of the <a href="http://www.cs.utah.edu/~lizhang/HPCA19/">19th International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Shenzhen, China, February 2013. <a href="https://people.inf.ethz.ch/omutlu/pub/subramanian_hpca13_talk.pptx">Slides (pptx)</a>
</li>
<p><li
>Eiman Ebrahimi, Chang Joo Lee, <u>Onur Mutlu</u>, and Yale N. Patt,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/fairness-via-throttling_acm_tocs12.pdf">"Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems"</a></b> <br> <i><a href="http://tocs.acm.org/">ACM Transactions on Computer Systems</a> (<b>TOCS</b>)</i>, April 2012. <br> <a href="http://hps.ece.utexas.edu/pub/TR-HPS-2012-001.pdf">A previous version</a> as HPS Technical Report, TR-HPS-2012-001, February 2012. </li> </li>
<p><li>Sai Prashanth Muralidhara, Lavanya Subramanian, <u>Onur Mutlu</u>, Mahmut Kandemir, and Thomas Moscibroda, <br>
<b><a href="https://people.inf.ethz.ch/omutlu/pub/memory-channel-partitioning-micro11.pdf"> "Reducing Memory Interference in Multicore Systems via Application-Aware Memory Channel Partitioning"</a></b><br> <i>Proceedings of the <a href="http://www.microarch.org/micro44/">44th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Porto Alegre, Brazil, December 2011. <a href="https://people.inf.ethz.ch/omutlu/pub/subramanian_micro11_talk.pptx">Slides (pptx)</a> <br> <!--a href="https://people.inf.ethz.ch/omutlu/pub/memory-channel-partitioning-TR-SAFARI-2011-002.pdf">A previous version</a> as SAFARI Technical Report, TR-SAFARI-2011-002, Carnegie Mellon University, June 2011. </li-->
<p><li>
Hasan Hassan, Minesh Patel, Jeremie S. Kim, A. Giray Yaglikci, Nandita Vijaykumar, Nika Mansourighiasi, Saugata Ghose, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/CROW-DRAM-substrate-for-performance-energy-reliability_isca19.pdf">"CROW: A Low-Cost Substrate for Improving DRAM Performance, Energy Efficiency, and Reliability"</a></b><br> <i>Proceedings of the <a href="http://iscaconf.org/isca2019/">46th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Phoenix, AZ, USA, June 2019. <!--br>[<a href="https://people.inf.ethz.ch/omutlu/pub/X-MEM_Expressive-Memory-for-Rich-Cross-Layer-Abstractions_isca18-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/X-MEM_Expressive-Memory-for-Rich-Cross-Layer-Abstractions_isca18-talk.pdf">(pdf)</a>]--> <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/CROW-DRAM-substrate-for-performance-energy-reliability_isca19-lightning-talk.pptx">Lightning Talk Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/CROW-DRAM-substrate-for-performance-energy-reliability_isca19-lightning-talk.pdf">(pdf)</a>] <br>[<a href="https://www.youtube.com/watch?v=8Ml5sz63Jbc">Lightning Talk Video</a>] <br></li>
<p><li>Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, and <u>Onur Mutlu</u>,<br>
<b><a href="https://people.inf.ethz.ch/omutlu/pub/bliss-memory-scheduler_ieee-tpds16.pdf">"BLISS: Balancing Performance, Fairness and Complexity in Memory Access Scheduling"</a></b><br> <i><a href="http://www.computer.org/web/tpds/">IEEE Transactions on Parallel and Distributed Systems</a> (<b>TPDS</b>)</i>, to appear in 2016.</li> <a href="http://arxiv.org/pdf/1504.00390.pdf">arXiv.org version</a>, April 2015. <br> <a href="https://people.inf.ethz.ch/omutlu/pub/bliss-memory-scheduler_cmu-safari-tr15.pdf">An earlier version</a> as <a href="http://www.ece.cmu.edu/~safari/tr.html"><i>SAFARI Technical Report</i></a>, TR-SAFARI-2015-004, Carnegie Mellon University, March 2015. </li> <br>[<a href="https://github.com/CMU-SAFARI/MemSchedSim">Source Code</a>]
<p><li
><u>Onur Mutlu</u>, <br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/mutlu_dissertation.pdf"><!--A HREF="https://people.inf.ethz.ch/omutlu/pub/TR-HPS-2006-006.pdf"-->"Efficient Runahead Execution Processors"</a></b><br> Ph.D. Dissertation, HPS Technical Report, TR-HPS-2006-007, July 2006. <a href="https://people.inf.ethz.ch/omutlu/pub/mutlu_phd_defense_talk.ppt">Slides (ppt)</a> <br> <b><i><span style='color:red'>Nominated for the ACM Doctoral Dissertation Award by the University of Texas at Austin.</span></i></b></li>
<p><li>HanBin Yoon, Justin Meza, Rachata Ausavarungnirun, Rachael Harding, and <u>Onur Mutlu</u>,<br>
<b><a href="https://people.inf.ethz.ch/omutlu/pub/rowbuffer-aware-caching_iccd12.pdf">"Row Buffer Locality Aware Caching Policies for Hybrid Memories"</a></b><br> <i> Proceedings of the <a href="http://www.iccd-conf.com/">30th IEEE International Conference on Computer Design</a> (<b>ICCD</b>)</i>, Montreal, Quebec, Canada, September 2012. <a href="https://people.inf.ethz.ch/omutlu/pub/yoon_iccd12_talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/yoon_iccd12_talk.pdf">(pdf)</a> <br> <b><i><font color="red">Best paper award (in Computer Systems and Applications track).</font></i></b> </li>
<p><li>
Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, <u>Onur Mutlu</u>, and Srinivas Devadas,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/banshee-bandwidth-efficient-DRAM-cache_micro17.pdf"> "Banshee: Bandwidth-Efficient DRAM Caching via Software/Hardware Cooperation"</a></b><br> <i>Proceedings of the <a href="http://www.microarch.org/micro50/">50th International Symposium on Microarchitecture</a> (<b>MICRO</b>)</i>, Boston, MA, USA, October 2017. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/banshee-bandwidth-efficient-DRAM-cache_micro17-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/banshee-bandwidth-efficient-DRAM-cache_micro17-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/banshee-bandwidth-efficient-DRAM-cache_micro17-lightning-talk.pptx">Lightning Session Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/banshee-bandwidth-efficient-DRAM-cache_micro17-lightning-talk.pdf">(pdf)</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/banshee-bandwidth-efficient-DRAM-cache_micro17-poster.pptx">Poster (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/banshee-bandwidth-efficient-DRAM-cache_micro17-poster.pdf">(pdf)</a>] <br>[<a href="https://github.com/yxymit/banshee">Source Code</a>] <br> </li>
<p><li>
Justin Meza, Yixin Luo, Samira Khan, Jishen Zhao, Yuan Xie, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/persistent-memory-management_weed13.pdf">"A Case for Efficient Hardware-Software Cooperative Management of Storage and Memory"</a></b></br> <i>Proceedings of the <a href="http://research.ihost.com/weed2013/">5th Workshop on Energy-Efficient Design</a> (<b>WEED</b>)</i>, Tel-Aviv, Israel, June 2013. <a href="https://people.inf.ethz.ch/omutlu/pub/mutlu_weed13_talk.pptx">Slides (pptx)</a> <a href="pub/mutlu_weed13_talk.pdf">Slides (pdf)</a> <br> </li>
<p><li>
Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/CONDA-coherence-for-near-data-accelerators_isca19.pdf">"CoNDA: Efficient Cache Coherence Support for Near-Data Accelerators"</a></b><br> <i>Proceedings of the <a href="http://iscaconf.org/isca2019/">46th International Symposium on Computer Architecture</a> (<b>ISCA</b>)</i>, Phoenix, AZ, USA, June 2019.
<br>[<a href=“https://people.inf.ethz.ch/omutlu/pub/CONDA-coherence-for-near-data-accelerators_isca19-lightning-talk.pptx”>Lightning Talk Slides (pptx)</a> <a href=“https://people.inf.ethz.ch/omutlu/pub/CONDA-coherence-for-near-data-accelerators_isca19-lightning-talk.pdf”>(pdf)</a>]
<br>[<a href="https://www.youtube.com/watch?v=Vz2PiHuYHAU">Lightning Talk Video</a>] <br></li>
<p><li>
Yixin Luo, Sriram Govindan, Bikash Sharma, Mark Santaniello, Justin Meza, Aman Kansal, Jie Liu, Badriddine Khessib, Kushagra Vaid, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/heterogeneous-reliability-memory-for-data-centers_dsn14.pdf">"Characterizing Application Memory Error Vulnerability to Optimize Data Center Cost via Heterogeneous-Reliability Memory"</a></b> <br> <i>Proceedings of the <a href="http://2014.dsn.org/">44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks </a> (<b>DSN</b>)</i>, Atlanta, GA, June 2014. [<a href="https://people.inf.ethz.ch/omutlu/pub/heterogeneous-reliability-memory_dsn14-summary.pdf">Summary</a>] [<a href="https://people.inf.ethz.ch/omutlu/pub/heterogeneous-reliability-memory-for-data-centers_luo_dsn14-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/heterogeneous-reliability-memory-for-data-centers_luo_dsn14-talk.pdf">(pdf)</a>] [<a href="http://www.zdnet.com/how-good-does-memory-need-to-be-7000031853/">Coverage on ZDNet</a>]
<p><li>
Justin Meza, Qiang Wu, Sanjeev Kumar, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/flash-memory-failures-in-the-field-at-facebook_sigmetrics15.pdf">"A Large-Scale Study of Flash Memory Errors in the Field"</a></b> <br> <i>Proceedings of the <a href="http://www.sigmetrics.org/sigmetrics2015/"> ACM International Conference on Measurement and Modeling of Computer Systems</a> (<b>SIGMETRICS</b>)</i>, Portland, OR, June 2015. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/flash-memory-failures-in-the-field-at-facebook_sigmetrics15-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/flash-memory-failures-in-the-field-at-facebook_sigmetrics15-talk.pdf">(pdf)</a>] [<a href="http://www.zdnet.com/article/facebooks-ssd-experience/">Coverage at ZDNet</a>] [<a href="http://www.theregister.co.uk/2015/06/22/facebook_reveals_ssd_failure_rate_trough/">Coverage on The Register</a>] [<a href="http://www.techspot.com/news/61090-researchers-publish-first-large-scale-field-ssd-reliability.html">Coverage on TechSpot</a>] [<a href="http://techreport.com/news/28519/facebook-ssd-reliability-study-shows-early-burnouts">Coverage on The Tech Report</a>] <!--a href="https://people.inf.ethz.ch/omutlu/pub/neighbor-assisted-error-correction-in-flash_cai_sigmetrics14-talk.ppt">Slides (ppt)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/neighbor-assisted-error-correction-in-flash_cai_sigmetrics14-talk.pdf">(pdf)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/neighbor-assisted-error-correction-in-flash_cai_sigmetrics14-poster.ppt">Poster (ppt)</a-->
</li>
<p><li
>Benjamin C. Lee, Ping Zhou, Jun Yang, Youtao Zhang, Bo Zhao, Engin Ipek, <u>Onur Mutlu</u>, and Doug Burger,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/pcm_ieee_micro10.pdf">"Phase Change Technology and the Future of Main Memory"</a></b><br> <i><a href="http://www.computer.org/micro/">IEEE Micro</a>, Special Issue: Micro's Top Picks from 2009 Computer Architecture Conferences (<b>MICRO TOP PICKS</b>)</i>, Vol. 30, No. 1, pages 60-70, January/February 2010. </li>
<p><li>
Kevin K. Chang, Prashant J. Nair, Saugata Ghose, Donghyuk Lee, Moinuddin K. Qureshi, and <u>Onur Mutlu</u>,<br> <b><a href="https://people.inf.ethz.ch/omutlu/pub/lisa-dram_hpca16.pdf">"Low-Cost Inter-Linked Subarrays (LISA): Enabling Fast Inter-Subarray Data Movement in DRAM"</a></b> <br> <i>Proceedings of the <a href="http://hpca22.site.ac.upc.edu/">22nd International Symposium on High-Performance Computer Architecture</a> (<b>HPCA</b>)</i>, Barcelona, Spain, March 2016. <br>[<a href="https://people.inf.ethz.ch/omutlu/pub/lisa-dram_kevinchang_hpca16-talk.pptx">Slides (pptx)</a> <a href="https://people.inf.ethz.ch/omutlu/pub/lisa-dram_kevinchang_hpca16-talk.pdf">(pdf)</a>] <br>[<a href="https://github.com/CMU-SAFARI/RamulatorSharp">Source Code</a>]
</li>
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readings.txt · Last modified: 2019/07/08 09:32 by 127.0.0.1