Table of Contents
Exploration of Emerging Memory Systems: 227-0085-34L
Course Description
DRAM is predominantly used to build the main memory systems of modern computing devices. Emerging memory technologies (RRAM, PCM, STT-MRAM, FeRAM) provide an exciting opportunity to replace or complement DRAM. Simulation-based experimental studies are key for understanding the complex interactions between DRAM, emerging memory technologies, and modern applications. Ramulator is an extensible main memory simulator providing cycle-accurate performance models for a variety of commercial DRAM standards (e.g., DDR3/4, LPDDR3/4, GDDR5, HBM), emerging memory technologies, and academic proposals. Ramulator has a modular design that enables easy integration of additional standards, technologies and mechanisms. Ramulator is written in C++11 and can be easily integrated to full-system simulators such as gem5.
In this P&S, you will design new memory and memory controller mechanisms for improving overall system performance, energy consumption, reliability, security, scalability and cost. You will extend Ramulator with these new designs and evaluate their performance, energy consumption, and reliability using modern applications.
This will be the right P&S for you if you would like to learn about the state-of-the-art and future memory and memory controller designs and their interaction with modern applications. This P&S will also enable you to hands-on simulate and understand the memory system behavior of modern workloads such as machine learning, graph analytics, genome analysis.
Prerequisites of the course:
- Digital Design and Computer Architecture (or equivalent course)
- A good knowledge in C/C++ programming language.
- Interest in making things efficient and solving problems.
- Interest in understanding software development and hardware design, and their interactions.
The course is conducted in English.
Mentors
Mailing List: safari-ps-ramulator@sympa.ethz.ch (sent to all mentors)
Name | Office | ||
---|---|---|---|
Lead Supervisor | Haocong Luo | haocong.luo@inf.ethz.ch | ETZ H 61.2 |
Supervisor | Giray Yaglikci | giray.yaglikci@safari.ethz.ch | ETZ H 61.2 |
Supervisor | Geraldo de Oliveira | geraldo.deoliveira@safari.ethz.ch | ETZ H 61.2 |
Supervisor | Ataberk Olgun | ataberk.olgun@safari.ethz.ch | ETZ H 61.2 |
Supervisor | Nisa Bostanci |
Lecture Video Playlist on YouTube
2022 Meetings/Schedule (Tentative)
Learning Materials
- An old version of Ramulator: https://github.com/CMU-SAFARI/ramulator
- Original Ramulator paper: https://people.inf.ethz.ch/omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf
- An example study of modern workloads and DRAM architectures using Ramulator: https://people.inf.ethz.ch/omutlu/pub/Workload-DRAM-Interaction-Analysis_sigmetrics19_pomacs19.pdf
- An example recent study of a new DRAM architecture using Ramulator: https://people.inf.ethz.ch/omutlu/pub/CLR-DRAM_capacity-latency-reconfigurable-DRAM_isca20.pdf
- An example recent study of a new virtual memory system architecture using Ramulator: https://people.inf.ethz.ch/omutlu/pub/VBI-virtual-block-interface_isca20.pdf
- Three examples of new ideas enabled by Ramulator based evaluation: