Publications

Onur Mutlu: Google Scholar and DBLP

Research Summary Papers

2024

 

2023

• Rahul Bera, Adithya Ranganathan, Joydeep Rakshit, Sujit Mahto, Anant V. Nori, Jayesh Gaur, Ataberk Olgun, Konstantinos Kanellopoulos, Mohammad Sadrosadati, Sreenivas Subramoney, and Onur Mutlu,
  “Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Execution”
  Proceedings of the 51th Annual International Symposium on Computer Architecture (ISCA), Buenos Aires, Argentina, June 2024.
  [arXiv version]
  [Load Inspector Source Code]
• Ataberk Olgun, Yahya Can Tugrul, Nisa Bostanci, Ismail Emir Yuksel, Haocong Luo, Steve Rhyner, Abdullah Giray Yaglikci, Geraldo F. Oliveira, and Onur Mutlu,
  “ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation”
  To appear in Proceedings of the 33rd USENIX Security Symposium (USENIX Security), Philadelphia, PA, USA, August 2024.
  [arXiv version]
  [ABACuS Source Code]

 

2023

 

• Konstantinos Kanellopoulos, Hong Chul Nam, F. Nisa Bostanci, Rahul Bera, Mohammad Sadrosadati, Rakesh Kumar, Davide Basilio Bartolini, and Onur Mutlu,
  
  “Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources”
  Proceedings of the 56th International Symposium on Microarchitecture (MICRO), Toronto, ON, Canada, November 2023.[Slides (pptx) (pdf)]
  
  [arXiv version]
  [Victima Source Code (Officially Artifact Evaluated with All Badges)]
  Officially artifact evaluated as available, functional, reusable and reproducible.
  Distinguished artifact award at MICRO 2023.

 

2018

Madeleine Gray and Onur Mutlu,
“‘It’s the memory, stupid’: A conversation with Onur Mutlu”
HiPEAC info 55, HiPEAC Newsletter, October 2018.
[Shorter Version in Newsletter]
[Longer Online Version with References]

Lois Orosa, Rodolfo Azevedo, and Onur Mutlu,
“AVPP: Address-first Value-next Predictor with Value Prefetching for Improving the Efficiency of Load Value Prediction”
ACM Transactions on Architecture and Code Optimization (TACO), to appear, 2018.

Justin Meza, Tianyin Xu, Kaushik Veeraraghavan, and Onur Mutlu,
“A Large Scale Study of Data Center Network Reliability”
Proceedings of the 18th ACM Internet Measurement Conference (IMC), Boston, MA, USA, October/November 2018.
[Slides (pptx) (pdf)]

Kevin Hsieh, Ganesh Ananthanarayanan, Peter Bodik, Shivaram Venkataraman, Paramvir Bahl, Matthai Philipose, Phillip B. Gibbons, and Onur Mutlu,
“Focus: Querying Large Video Datasets with Low Latency and Low Cost”
Proceedings of the 13th USENIX Symposium on Operating Systems Design and Implementation (OSDI), Carlsbad, CA, USA, October 2018.
[Slides (pptx) (pdf)]
[Demo of the Focus System (3 minutes)]
[Audio Recording of the Talk (23 minutes)]

Yaohua Wang, Arash Tavakkol, Lois Orosa, Saugata Ghose, Nika Mansouri Ghiasi, Minesh Patel, Jeremie S. Kim, Hasan Hassan, Mohammad Sadrosadati, and Onur Mutlu,
“Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration”
Proceedings of the 51st International Symposium on Microarchitecture (MICRO), Fukuoka, Japan, October 2018.
[Slides (pptx) (pdf)] [Lightning Talk Slides (pptx) (pdf)] [Poster (pptx) (pdf)]
[Lightning Talk Video (2 minutes)]
[Full Talk Video (14 minutes)]

Jeremie S. Kim, Minesh Patel, Hasan Hassan, and Onur Mutlu,
“Solar-DRAM: Reducing DRAM Access Latency by Exploiting the Variation in Local Bitlines”
Proceedings of the 36th IEEE International Conference on Computer Design (ICCD), Orlando, FL, USA, October 2018.
[Slides (pptx) (pdf)]
[Talk Video (16 minutes)]

Feng Zhang, Jidong Zhai, Xipeng Shen, Onur Mutlu, and Wenguang Chen,
“Efficient Document Analytics on Compressed Data: Method, Challenges, Algorithms, Insights”
Proceedings of the 44th International Conference on Very Large Databases (VLDB), Rio de Janeiro, Brazil, August 2018.
[Slides (pptx) (pdf)] [Poster (pptx) (pdf)]

Rachata Ausavarungnirun, Joshua Landgraf, Vance Miller, Saugata Ghose, Jayneel Gandhi, Christopher J. Rossbach, and and Onur Mutlu,
“Mosaic: Enabling Application-Transparent Support for Multiple Page Sizes in Throughput Processors”
ACM SIGOPS Operating Systems Review (OSR), July 2018.

Saugata Ghose, A. Giray Yaglikci, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O’Connor, and Onur Mutlu,
“What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study”
Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Irvine, CA, USA, June 2018.
[Abstract]
[POMACS Journal Version (same content, different format)]
[Slides (pptx) (pdf)]
[VAMPIRE DRAM Power Model]

Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, and Onur Mutlu,
“Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation”
Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Irvine, CA, USA, June 2018.
[Abstract]
[POMACS Journal Version (same content, different format)]
[Slides (pptx) (pdf)]

Saba Ahmadian, Onur Mutlu, and Hossein Asadi,
“ECI-Cache: A High-Endurance and Cost-Efficient I/O Caching Scheme for Virtualized Platforms”
Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Irvine, CA, USA, June 2018.
[Abstract] [POMACS Journal Version (same content, different format)]
[Slides (pptx) (pdf)]

Nandita Vijaykumar, Abhilasha Jain, Diptesh Majumdar, Kevin Hsieh, Gennady Pekhimenko, Eiman Ebrahimi, Nastaran Hajinazar, Phillip B. Gibbons and Onur Mutlu,
“A Case for Richer Cross-layer Abstractions: Bridging the Semantic Gap with Expressive Memory”
Proceedings of the 45th International Symposium on Computer Architecture (ISCA), Los Angeles, CA, USA, June 2018.
[Slides (pptx) (pdf)] [Lightning Talk Slides (pptx) (pdf)]
[Lightning Talk Video]

Nandita Vijaykumar, Eiman Ebrahimi, Kevin Hsieh, Phillip B. Gibbons and Onur Mutlu,
“The Locality Descriptor: A Holistic Cross-Layer Abstraction to Express Data Locality in GPUs”
Proceedings of the 45th International Symposium on Computer Architecture (ISCA), Los Angeles, CA, USA, June 2018.
[Slides (pptx) (pdf)] [Lightning Talk Slides (pptx) (pdf)]
[Lightning Talk Video]

Arash Tavakkol, Mohammad Sadrosadati, Saugata Ghose, Jeremie Kim, Yixin Luo, Yaohua Wang, Nika Mansouri Ghiasi, Lois Orosa, Juan G. Luna and Onur Mutlu,
“FLIN: Enabling Fairness and Enhancing Performance in Modern NVMe Solid State Drives”
Proceedings of the 45th International Symposium on Computer Architecture (ISCA), Los Angeles, CA, USA, June 2018.
[Slides (pptx) (pdf)] [Lightning Talk Slides (pptx) (pdf)]
[Lightning Talk Video]

Damla Senol, Jeremie Kim, Saugata Ghose, Can Alkan, and Onur Mutlu,
“Nanopore Sequencing Technology and Tools for Genome Assembly: Computational Analysis of the Current State, Bottlenecks and Future Directions”
Briefings in Bioinformatics (BIB), 2018.
[Open arxiv.org version]

Anup Das, Hasan Hassan, and Onur Mutlu,
“VRL-DRAM: Improving DRAM Performance via Variable Refresh Latency”
Proceedings of the 55th Design Automation Conference (DAC), San Francisco, CA, USA, June 2018.
[Slides (pdf)] [Poster (pdf)]

Feng Zhang, Jidong Zhai, Xipeng Shen, Onur Mutlu, and Wenguang Chen,
“Zwift: A Programming Framework for High Performance Text Analytics on Compressed Data”
Proceedings of the 32nd International Conference on Supercomputing (ICS), Beijing, China, June 2018.
[Slides (pptx) (pdf)]

Rachata Ausavarungnirun, Vance Miller, Joshua Landgraf, Saugata Ghose, Jayneel Gandhi, Adwait Jog, Christopher J. Rossbach, and Onur Mutlu,
MASK: Redesigning the GPU Memory Hierarchy to Support Multi-Application Concurrency”
Proceedings of the 23rd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Williamsburg, VA, USA, March 2018.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]
[Lightning Talk Video]

Maciej Besta, Syed Minhaj Hassan, Sudhakar Yalamanchili, Rachata Ausavarungnirun, Onur Mutlu, Torsten Hoefler,
“Slim NoC: A Low-Diameter On-Chip Network Topology for High Energy Efficiency and Scalability”
Proceedings of the 23rd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Williamsburg, VA, USA, March 2018.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pdf)]

Amirali Boroumand, Saugata Ghose, Youngsok Kim, Rachata Ausavarungnirun, Eric Shiu, Rahul Thakur, Daehyun Kim, Aki Kuusela, Allan Knies, Parthasarathy Ranganathan, and Onur Mutlu,
“Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks”
Proceedings of the 23rd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Williamsburg, VA, USA, March 2018.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]
[Lightning Talk Video (2 minutes)]
[Full Talk Video (21 minutes)]

Amir M. Rahmani, Bryan Donyanavard, Tiago Mück, Kasra Moazzemi, Axel Jantsch, Onur Mutlu, and Nikil Dutt,
“SPECTR: Formal Supervisory Control and Coordination for Many-core Systems Resource Management”
Proceedings of the 23rd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Williamsburg, VA, USA, March 2018.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]

Mohammad Sadrosadati, Amirhossein Mirhosseini, Seyed Borna Ehsani, Hamid Sarbazi-Azad, Mario Drumond, Babak Falsafi, Rachata Ausavarungnirun, and Onur Mutlu,
“LTRF: Enabling High-Capacity Register Files for GPUs via Hardware/Software Cooperative Register Prefetching”
Proceedings of the 23rd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Williamsburg, VA, USA, March 2018.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]]

Arash Tavakkol, Juan Gomez-Luna, Mohammad Sadrosadati, Saugata Ghose, and Onur Mutlu,
“MQSim: A Framework for Enabling Realistic Studies of Modern Multi-Queue SSD Devices”
Proceedings of the 16th USENIX Conference on File and Storage Technologies (FAST), Oakland, CA, USA, February 2018.
[Slides (pptx) (pdf)]
[Source Code]

Jeremie S. Kim, Minesh Patel, Hasan Hassan, and Onur Mutlu,
“The DRAM Latency PUF: Quickly Evaluating Physical Unclonable Functions by Exploiting the Latency-Reliability Tradeoff in Modern DRAM Devices”
Proceedings of the 24th International Symposium on High-Performance Computer Architecture (HPCA), Vienna, Austria, February 2018.
[Lightning Talk Video]
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]

Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, and Onur Mutlu,
“HeatWatch: Improving 3D NAND Flash Memory Device Reliability by Exploiting Self-Recovery and Temperature-Awareness”
Proceedings of the 24th International Symposium on High-Performance Computer Architecture (HPCA), Vienna, Austria, February 2018.
[Lightning Talk Video]
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]

Onur Mutlu, Scott A. Mahlke, Thomas M. Conte, and Wen-Mei W. Hwu,
“Iterative Modulo Scheduling”
IEEE Micro (IEEE MICRO), Vol. 38, No. 1, pages 115-117, January/February 2018.

Jeremie S. Kim, Damla Senol Cali, Hongyi Xin, Donghyuk Lee, Saugata Ghose, Mohammed Alser, Hasan Hassan, Oguz Ergin, Can Alkan, and Onur Mutlu,
“GRIM-Filter: Fast Seed Location Filtering in DNA Read Mapping Using Processing-in-Memory Technologies”
BMC Genomics, 2018.
Proceedings of the 16th Asia Pacific Bioinformatics Conference (APBC), Yokohama, Japan, January 2018.
[Slides (pptx) (pdf)]
[Source Code]
arxiv.org Version (pdf)

Jeremie Kim, Damla Senol, Hongyi Xin, Donghyuk Lee, Mohammed Alser, Hasan Hassan, Oguz Ergin, Can Alkan, and Onur Mutlu,
“GRIM-Filter: Fast Seed Location Filtering in DNA Read Mapping Using Processing-in-Memory Technologies”
Pacific Symposium on Biocomputing (PSB) Poster Session, Hawaii, January 2018.
[Poster (pdf) (pptx)] [Abstract (pdf)]

Mohammed Alser, Hasan Hassan, Hongyi Xin, Oguz Ergin, Onur Mutlu, and Can Alkan,
“GateKeeper: A New Hardware Architecture for Accelerating Pre-Alignment in DNA Short Read Mapping”
Pacific Symposium on Biocomputing (PSB) Poster Session, Hawaii, January 2018.
[Poster (pdf) (pptx)] [Abstract (pdf)]

2017

Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie Kim, Michael A. Kozuch, Onur Mutlu, Phillip B. Gibbons, and Todd C. Mowry,
“Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology”
Proceedings of the 50th International Symposium on Microarchitecture (MICRO), Boston, MA, USA, October 2017.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]

Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Onur Mutlu, and Srinivas Devadas,
“Banshee: Bandwidth-Efficient DRAM Caching via Software/Hardware Cooperation”
Proceedings of the 50th International Symposium on Microarchitecture (MICRO), Boston, MA, USA, October 2017.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]
[Source Code]

Samira Khan, Chris Wilkerson, Zhe Wang, Alaa R. Alameldeen, Donghyuk Lee, and Onur Mutlu,
“Detecting and Mitigating Data-Dependent DRAM Failures by Exploiting Current Memory Content”
Proceedings of the 50th International Symposium on Microarchitecture (MICRO), Boston, MA, USA, October 2017.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]

Rachata Ausavarungnirun, Joshua Landgraf, Vance Miller, Saugata Ghose, Jayneel Gandhi, Christopher J. Rossbach, and Onur Mutlu,
“Mosaic: A GPU Memory Manager with Application-Transparent Support for Multiple Page Sizes”
Proceedings of the 50th International Symposium on Microarchitecture (MICRO), Boston, MA, USA, October 2017.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]
[Source Code]

Yu Cai, Saugata Ghose, Erich F. Haratsch, Yixin Luo, and Onur Mutlu,
“Error Characterization, Mitigation, and Recovery in Flash Memory Based Solid State Drives”
to appear in Proceedings of the IEEE, September 2017.
[Preliminary arxiv.org version]

Yang Li, Saugata Ghose, Jongmoo Choi, Jin Sun, Hui Wang, and Onur Mutlu,
“Utility-Based Hybrid Memory Management”
Proceedings of the 19th IEEE Cluster Conference (CLUSTER), Honolulu, Hawaii, USA, September 2017.
[Slides (pptx) (pdf)]

Zhiyu Liu, Irina Calciu, Maurice Herlihy, and Onur Mutlu,
“Concurrent Data Structures for Near-Memory Computing”
Proceedings of the 29th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), Washington, DC, USA, July 2017.
[Slides (pptx) (pdf)]

Mohammed Alser, Onur Mutlu, and Can Alkan,
“MAGNET: Understanding and Improving the Accuracy of Genome Pre-Alignment Filtering”
IPSI Transactions on Internet Research, July 2017.
arXiv.org version, July 2017.
[Source Code]

Vivek Seshadri and Onur Mutlu,
“Simple Operations in Memory to Reduce Data Movement”
Invited Book Chapter in Advances in Computers, 2017.
arXiv.org version, October 2016.

Minesh Patel, Jeremie S. Kim, and Onur Mutlu,
“The Reach Profiler (REAPER): Enabling the Mitigation of DRAM Retention Failures via Profiling at Aggressive Conditions”
Proceedings of the 44th International Symposium on Computer Architecture (ISCA), Toronto, Canada, June 2017.
[Slides (pptx) (pdf)]
[Lightning Session Slides (pptx) (pdf)]

Kevin Chang, A. Giray Yaglikci, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O’Connor, Hasan Hassan, and Onur Mutlu,
“Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms”
Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Urbana-Champaign, IL, USA, June 2017.
[Abstract] [POMACS Journal Version (same content, different format)]
[Slides (pptx) (pdf)]
[Full Data Sets and Circuit Model]

Donghyuk Lee, Samira Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, and Onur Mutlu,
“Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms”
Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Urbana-Champaign, IL, USA, June 2017.
[Abstract] [POMACS Journal Version (same content, different format)]
[Slides (pptx) (pdf)]

Xiyue Xiang, Wentao Shi, Saugata Ghose, Lu Peng, Onur Mutlu, and Nian-Feng Tzeng,
“Carpool: A Bufferless On-Chip Network Supporting Adaptive Multicast and Hotspot Alleviation”
Proceedings of the International Conference on Supercomputing (ICS), Chicago, IL, USA, June 2017.
[Slides (pptx) (pdf)]

Mohammed Alser, Hasan Hassan, Hongyi Xin, Oguz Ergin, Onur Mutlu, and Can Alkan
“GateKeeper: A New Hardware Architecture for Accelerating Pre-Alignment in DNA Short Read Mapping”
Bioinformatics, [published online, May 31], 2017.
[Source Code]
[Online link at Bioinformatics Journal]

Kaan Kara, Dan Alistarh, Gustavo Alonso, Onur Mutlu, and Ce Zhang,
“FPGA-accelerated Dense Linear Machine Learning: A Precision-Convergence Trade-off”
Proceedings of the 25th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa, CA, USA, April-May 2017.
[Slides (pptx) (pdf)]

Kevin Hsieh, Aaron Harlap, Nandita Vijaykumar, Dimitris Konomis, Gregory R. Ganger, Phillip B. Gibbons, and Onur Mutlu,
“Gaia: Geo-Distributed Machine Learning Approaching LAN Speeds”
Proceedings of the 14th USENIX Symposium on Networked Systems Design and Implementation (NSDI), Boston, MA, USA, March 2017.
[Slides (pptx) (pdf)]

Onur Mutlu,
“The RowHammer Problem and Other Issues We May Face as Memory Becomes Denser”
Invited Paper in Proceedings of the Design, Automation, and Test in Europe Conference (DATE), Lausanne, Switzerland, March 2017.
[Slides (pptx) (pdf)]

Aya Fukami, Saugata Ghose, Yixin Luo, Yu Cai, and Onur Mutlu,
“Improving the Reliability of Chip-Off Forensic Analysis of NAND Flash Memory Devices”
Proceedings of the Digital Forensics Conference (DFRWS EU), Lake Constance, Germany, March 2017.
[Slides (pptx) (pdf)]
Best paper award.

Hasan Hassan, Nandita Vijaykumar, Samira Khan, Saugata Ghose, Kevin Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, and Onur Mutlu,
“SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies”
Proceedings of the 23rd International Symposium on High-Performance Computer Architecture (HPCA), Austin, TX, USA, February 2017.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]
[Source Code]

Yu Cai, Saugata Ghose, Yixin Luo, Ken Mai, Onur Mutlu, and Erich F. Haratsch,
“Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques”
Proceedings of the 23rd International Symposium on High-Performance Computer Architecture (HPCA) Industrial Session, Austin, TX, USA, February 2017.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]

Jeremie Kim, Damla Senol, Hongyi Xin, Donghyuk Lee, Mohammed Alser, Hasan Hassan, Oguz Ergin, Can Alkan, and Onur Mutlu,
“Genome Read In-Memory (GRIM) Filter: Fast Location Filtering in DNA Read Mapping Using Emerging Memory Technologies”
Pacific Symposium on Biocomputing (PSB) Poster Session, Hawaii, January 2017.
[Poster (pdf) (pptx)] [Abstract (pdf)]

Damla Senol, Jeremie Kim, Saugata Ghose, Can Alkan, and Onur Mutlu,
“Nanopore Sequencing Technology and Tools: Computational Analysis of the Current State, Bottlenecks and Future Directions”
Pacific Symposium on Biocomputing (PSB) Poster Session, Hawaii, January 2017.
[Poster (pdf) (pptx)] [Abstract (pdf)]

Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Abhishek Bhowmick, Rachata Ausavarungnirun, Chita Das, Mahmut Kandemir, Todd C. Mowry, and Onur Mutlu,
“A Framework for Accelerating Bottlenecks in GPU Execution with Assist Warps”
Invited Book Chapter in Advances in GPU Research and Practice, Morgan Kaufmann, 2017.
arXiv.org version, February 2016.

2016

Samira Khan, Chris Wilkerson, Donghyuk Lee, Alaa R. Alameldeen, and Onur Mutlu,
“A Case for Memory Content-Based Detection and Mitigation of Data-Dependent Failures in DRAM”
IEEE Computer Architecture Letters (CAL), November 2016.

Khanh Nguyen, Lu Fang, Guoqing Xu, Brian Demsky, Shan Lu, Sanazsadat Alamian, and Onur Mutlu,
“Yak: A High-Performance Big-Data-Friendly Garbage Collector”
Proceedings of the 12th USENIX Symposium on Operating Systems Design and Implementation (OSDI), Savannah, GA, USA, November 2016.
[Slides (pptx) (pdf)]

Himanshu Chauhan, Irina Calciu, Vijay Chidambaram, Eric Schkufza, Onur Mutlu, and Pratap Subrahmanyam,
“NVMove: Helping Programmers Move to Byte-Based Persistence”
Proceedings of the 4th Workshop on Interactions of NVM/Flash with Operating Systems and Workloads (INFLOW), Savannah, GA, USA, November 2016.
[Slides (pptx) (pdf)]

Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, and Onur Mutlu,
“Enabling Accurate and Practical Online Flash Channel Modeling for Modern MLC NAND Flash Memory”
IEEE Journal on Selected Areas in Communications (JSAC), 2016.

Nandita Vijaykumar, Kevin Hsieh, Gennady Pekhimenko, Samira Khan, Ashish Shrestha, Saugata Ghose, Adwait Jog, Phillip B. Gibbons, and Onur Mutlu,
“Zorua: A Holistic Approach to Resource Virtualization in GPUs”
Proceedings of the 49th International Symposium on Microarchitecture (MICRO), Taipei, Taiwan, October 2016.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pdf)]

Milad Hashemi, Onur Mutlu, and Yale N. Patt,
“Continuous Runahead: Transparent Hardware Acceleration for Memory Intensive Workloads”
Proceedings of the 49th International Symposium on Microarchitecture (MICRO), Taipei, Taiwan, October 2016.
[Slides (pptx) (pdf)] [Lightning Session Slides (pdf)] [Poster (pptx) (pdf)]
One of the six papers nominated for the Best Paper Award by the Program Committee.

Kevin Hsieh, Samira Khan, Nandita Vijaykumar, Kevin K. Chang, Amirali Boroumand, Saugata Ghose, and Onur Mutlu,
“Accelerating Pointer Chasing in 3D-Stacked Memory: Challenges, Mechanisms, Evaluation”
Proceedings of the 34th IEEE International Conference on Computer Design (ICCD), Phoenix, AZ, USA, October 2016.
[Slides (pptx) (pdf)]
[Source Code]

Xiyue Xiang, Saugata Ghose, Onur Mutlu, and Nian-Feng Tzeng,
“A Model for Application Slowdown Estimation in On-Chip Networks and Its Use for Improving System Fairness and Performance”
Proceedings of the 34th IEEE International Conference on Computer Design (ICCD), Phoenix, AZ, USA, October 2016.
[Slides (pptx) (pdf)]

Ashutosh Pattnaik, Xulong Tang, Adwait Jog, Onur Kayiran, Asit K. Mishra, Mahmut T. Kandemir, Onur Mutlu, and Chita R. Das,
“Scheduling Techniques for GPU Architectures with Processing-In-Memory Capabilities”
Proceedings of the 25th International Conference on Parallel Architectures and Compilation Techniques (PACT), Haifa, Israel, September 2016.
[Slides (pptx) (pdf)]

Onur Kayiran, Adwait Jog, Ashutosh Pattnaik, Rachata Ausavarungnirun, Xulong Tang, Mahmut T. Kandemir, Gabriel H. Loh, Onur Mutlu, and Chita R. Das,
“µC-States: Fine-grained GPU Datapath Power Management”
Proceedings of the 25th International Conference on Parallel Architectures and Compilation Techniques (PACT), Haifa, Israel, September 2016.
[Slides (pptx) (pdf)]

Onur Mutlu and Rich Belgard,
“Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed Code RISC Processor”
IEEE Micro (IEEE MICRO), Vol. 36, No. 4, pages 70-72, July/August 2016.

Onur Mutlu,
“ThyNVM: Software-Transparent Crash Consistency for Persistent Memory”
Technical talk at Flash Memory Summit 2016 (FMS), Santa Clara, CA, August 2016.
[Slides (ppt) (pdf)]

Onur Mutlu,
“Large-Scale Study of In-the-Field Flash Failures”
Technical talk at Flash Memory Summit 2016 (FMS), Santa Clara, CA, August 2016.
[Slides (pdf)]

Onur Mutlu,
“Rethinking Memory System Design”
Keynote talk at 2016 ACM SIGPLAN International Symposium on Memory Management (ISMM), Santa Barbara, CA, USA, June 2016.
[Slides (pptx) (pdf)]
[Abstract]

Onur Mutlu,
“The Row Hammer Problem and Other Issues We May Face as Memory Becomes Denser”
Invited Talk and Paper in Proceedings of the 53rd Design Automation Conference (DAC), Austin, TX, June 2016.
[Slides (pptx)] [Slides (pdf)]
[Paper] entitled “Who Is the Major Threat to Tomorrow’s Security? You, the Hardware Designer”

Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, and Onur Mutlu,
“LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory”
IEEE Computer Architecture Letters (CAL), June 2016.

Samira Khan, Donghyuk Lee, and Onur Mutlu,
“PARBOR: An Efficient System-Level Technique to Detect Data-Dependent Failures in DRAM”
Proceedings of the 45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Toulouse, France, June 2016.
[Slides (pptx) (pdf)]

Kevin Hsieh, Eiman Ebrahimi, Gwangsun Kim, Niladrish Chatterjee, Mike O’Connor, Nandita Vijaykumar, Onur Mutlu, and Stephen W. Keckler,
“Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems”
Proceedings of the 43rd International Symposium on Computer Architecture (ISCA), Seoul, South Korea, June 2016.
[Slides (pptx) (pdf)]
[Lightning Session Slides (pptx) (pdf)]

Milad Hashemi, Khubaib, Eiman Ebrahimi, Onur Mutlu, and Yale N. Patt,
“Accelerating Dependent Cache Misses with an Enhanced Memory Controller”
Proceedings of the 43rd International Symposium on Computer Architecture (ISCA), Seoul, South Korea, June 2016.
[Slides (pptx) (pdf)]
[Lightning Session Slides (pptx) (pdf)]

Kevin Chang, Abhijith Kashyap, Hasan Hassan, Samira Khan, Kevin Hsieh, Donghyuk Lee, Saugata Ghose, Gennady Pekhimenko, Tianshi Li, and Onur Mutlu,
“Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization”
Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Antibes Juan-Les-Pins, France, June 2016.
[Slides (pptx) (pdf)]
[Source Code]

Adwait Jog, Onur Kayiran, Ashutosh Pattnaik, Mahmut T. Kandemir, Onur Mutlu, Ravishankar Iyer, and Chita R. Das,
“Exploiting Core Criticality for Enhanced GPU Performance”
Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Antibes Juan-Les-Pins, France, June 2016.
[Slides (pptx) (pdf)]

Wayne Burleson, Onur Mutlu, and Mohit Tiwari,
“Who Is the Major Threat to Tomorrow’s Security? You, the Hardware Designer”
Invited Paper in Proceedings of the 53rd Design Automation Conference (DAC), Austin, TX, June 2016.
[Slides (pptx)] [Slides (pdf)] entitled “The Row Hammer Problem and Other Issues We May Face as Memory Becomes Denser”

Jeremie Kim, Damla Senol, Hongyi Xin, Donghyuk Lee, Mohammed Alser, Hasan Hassan, Oguz Ergin, Can Alkan, and Onur Mutlu,
“Genome Read In-Memory (GRIM) Filter: Fast Location Filtering in DNA Read Mapping with Emerging Memory Technologies”
20th Annual International Conference on Research in Computational Molecular Biology (RECOMB) Poster Session, Santa Monica, CA, April 2016.
[Poster (pdf) (pptx)]
[Flash Talk Slides (pptx) (pdf)] at 6th RECOMB Satellite Workshop on Massively Parallel Sequencing (RECOMB-SEQ).

Onur Mutlu,
“Reliability and Security Issues of DRAM and NAND Flash Scaling”
Memory Reliability Forum at HPCA, Barcelona, Spain, March 2016.
[Slides (pptx) (pdf)]

Yang Li, Di Wang, Saugata Ghose, Jie Liu, Sriram Govindan, Sean James, Eric Peterson, John Siegler, Rachata Ausavarungnirun, and Onur Mutlu,
“SizeCap: Efficiently Handling Power Surges in Fuel Cell Powered Data Centers”
Proceedings of the 22nd International Symposium on High-Performance Computer Architecture (HPCA), Barcelona, Spain, March 2016.
[Slides (pptx) (pdf)]

Kevin K. Chang, Prashant J. Nair, Saugata Ghose, Donghyuk Lee, Moinuddin K. Qureshi, and Onur Mutlu,
“Low-Cost Inter-Linked Subarrays (LISA): Enabling Fast Inter-Subarray Data Movement in DRAM”
Proceedings of the 22nd International Symposium on High-Performance Computer Architecture (HPCA), Barcelona, Spain, March 2016.
[Slides (pptx) (pdf)]
[Source Code]

Hasan Hassan, Gennady Pekhimenko, Nandita Vijaykumar, Vivek Seshadri, Donghyuk Lee, Oguz Ergin, and Onur Mutlu,
“ChargeCache: Reducing DRAM Latency by Exploiting Row Access Locality”
Proceedings of the 22nd International Symposium on High-Performance Computer Architecture (HPCA), Barcelona, Spain, March 2016.
[Slides (pptx) (pdf)]
[Source Code]

Gennady Pekhimenko, Evgeny Bolotin, Nandita Vijaykumar, Onur Mutlu, Todd C. Mowry, and Stephen W. Keckler,
“A Case for Toggle-Aware Compression for GPU Systems”
Proceedings of the 22nd International Symposium on High-Performance Computer Architecture (HPCA), Barcelona, Spain, March 2016.
[Slides (pptx) (pdf)]

Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Chang, Greg Nazario, Reetuparna Das, Gabriel Loh, and Onur Mutlu,
“A Case for Hierarchical Rings with Deflection Routing: An Energy-Efficient On-Chip Communication Substrate”
Parallel Computing (PARCO), to appear in 2016. arXiv.org version, February 2016.

Hyoseung Kim, Dionisio de Niz, Bjorn Andersson, Mark Klein, Onur Mutlu, and Ragunathan Rajkumar,
“Bounding and Reducing Memory Interference Delay in COTS-based Multi-Core Systems”
Journal of Real-Time Systems (RTS), to appear in 2016.

Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, and Onur Mutlu,
“BLISS: Balancing Performance, Fairness and Complexity in Memory Access Scheduling”
IEEE Transactions on Parallel and Distributed Systems (TPDS), to appear in 2016. arXiv.org version, April 2015.  An earlier version as SAFARI Technical Report, TR-SAFARI-2015-004, Carnegie Mellon University, March 2015. Source Code

Amir Yazdanbakhsh, Gennady Pekhimenko, Bradley Thwaites, Hadi Esmaeilzadeh, Onur Mutlu, and Todd C. Mowry,
“Mitigating the Memory Bottleneck With Approximate Load Value Prediction”
IEEE Design and Test (D&T), January/February 2016.

Onur Mutlu and Rich Belgard,
“The 2014 MICRO Test of Time Award Winners: From 1978 to 1992”
IEEE Micro (IEEE MICRO), Vol. 36, No. 1, pages 60-61, January/February 2016.

Hiroyuki Usui, Lavanya Subramanian, Kevin Kai-Wei Chang, and Onur Mutlu,
“DASH: Deadline-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators”
ACM Transactions on Architecture and Code Optimization (TACO), Vol. 12, January 2016.
Presented at the 11th HiPEAC Conference, Prague, Czech Republic, January 2016.
[Slides (pptx) (pdf)]
[Source Code]

Donghyuk Lee, Saugata Ghose, Gennady Pekhimenko, Samira Khan, and Onur Mutlu,
“Simultaneous Multi-Layer Access: Improving 3D-Stacked Memory Bandwidth at Low Cost”
ACM Transactions on Architecture and Code Optimization (TACO), Vol. 12, January 2016.
Presented at the 11th HiPEAC Conference, Prague, Czech Republic, January 2016.
[Slides (pptx) (pdf)]
[Source Code]

Amir Yazdanbakhsh, Gennady Pekhimenko, Bradley Thwaites, Hadi Esmaeilzadeh, Onur Mutlu, and Todd C. Mowry,
“RFVP: Rollback-Free Value Prediction with Safe to Approximate Loads”
ACM Transactions on Architecture and Code Optimization (TACO), Vol. 12, January 2016.
Presented at the 11th HiPEAC Conference, Prague, Czech Republic, January 2016.
[Slides (pptx) (pdf)]

2015

Onur Mutlu and Lavanya Subramanian,
“Research Problems and Opportunities in Memory Systems”
Invited Article in Supercomputing Frontiers and Innovations (SUPERFRI), 2014.

Onur Mutlu,
“Rethinking Memory System Design (along with Interconnects)”
Keynote talk at 8th International Workshop on Network on Chip Architectures (NoCArc), Honolulu, Hawaii, December 2015.
[Slides (pptx) (pdf)]
Abstract

Hongyi Xin, Sunny Nahar, Richard Zhu, John Emmons, Gennady Pekhimenko, Carl Kingsford, Can Alkan, and Onur Mutlu,
“Optimal Seed Solver: Optimizing Seed Selection in Read Mapping”
Bioinformatics, [published online, November 14], 2015.
[Source Code]

Lavanya Subramanian, Vivek Seshadri, Arnab Ghosh, Samira Khan, and Onur Mutlu,
“The Application Slowdown Model: Quantifying and Controlling the Impact of Inter-Application Interference at Shared Caches and Main Memory”
Proceedings of the 48th International Symposium on Microarchitecture (MICRO), Waikiki, Hawaii, USA, December 2015.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]
[Source Code]

Vivek Seshadri, Thomas Mullins, Amirali Boroumand, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry,
“Gather-Scatter DRAM: In-DRAM Address Translation to Improve the Spatial Locality of Non-unit Strided Accesses”
Proceedings of the 48th International Symposium on Microarchitecture (MICRO), Waikiki, Hawaii, USA, December 2015.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]

Jinglei Ren, Jishen Zhao, Samira Khan, Jongmoo Choi, Yongwei Wu, and Onur Mutlu,
“ThyNVM: Enabling Software-Transparent Crash Consistency in Persistent Memory Systems”
Proceedings of the 48th International Symposium on Microarchitecture (MICRO), Waikiki, Hawaii, USA, December 2015.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]
[Source Code]

Rachata Ausavarungnirun, Saugata Ghose, Onur Kayiran, Gabriel L. Loh, Chita R. Das, Mahmut T. Kandemir, and Onur Mutlu,
“Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance”
Proceedings of the 24th International Conference on Parallel Architectures and Compilation Techniques (PACT), San Francisco, CA, USA, October 2015.
[Slides (pptx) (pdf)]
[Source Code]

Donghyuk Lee, Lavanya Subramanian, Rachata Ausavarungnirun, Jongmoo Choi, and Onur Mutlu,
“Decoupled Direct Memory Access: Isolating CPU and IO Traffic by Leveraging a Dual-Data-Port DRAM”
Proceedings of the 24th International Conference on Parallel Architectures and Compilation Techniques (PACT), San Francisco, CA, USA, October 2015.
[Slides (pptx) (pdf)]

Youyou Lu, Jiwu Shu, Jia Guo, Shuai Li, and Onur Mutlu,
“High-Performance and Lightweight Transaction Support in Flash-Based SSDs”
IEEE Transactions on Computers (TC), October 2015.

Mohammad Fattah, Antti Airola, Rachata Ausavarungnirun, Nima Mirzaei, Pasi Liljeberg, Juha Plosila, Siamak Mohammadi, Tapio Pahikkala, Onur Mutlu, and Hannu Tenhunen,
“A Low-Overhead, Fully-Distributed, Guaranteed-Delivery Routing Algorithm for Faulty Network-on-Chips”
Proceedings of the 9th ACM/IEEE International Symposium on Networks on Chip (NOCS), Vancouver, BC, Canada, September 2015.
[Slides (pptx) (pdf)]
[Source Code]
One of the three papers nominated for the Best Paper Award by the Program Committee.

Onur Mutlu,
“Read Disturb Errors in MLC NAND Flash Memory”
Technical talk at Flash Memory Summit 2015 (FMS), Santa Clara, CA, August 2015.
[Slides (ppt) (pdf)] [Poster (pdf)]

Hongyi Xin, Richard Zhu, Sunny Nahar, John Emmons, Gennady Pekhimenko, Carl Kingsford, Can Alkan, and Onur Mutlu,
“Optimal Seed Solver: Optimizing Seed Selection in Read Mapping”
High Throughput Sequencing Algorithms and Applications (HITSEQ) Poster Session, Dublin, Ireland, July 2015.
arXiv.org, June 2015.
[Paper] [Poster (pdf) (pptx)]

Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Abhishek Bhowmick, Rachata Ausavarungnirun, Chita Das, Mahmut Kandemir, Todd C. Mowry, and Onur Mutlu,
“A Case for Core-Assisted Bottleneck Acceleration in GPUs: Enabling Flexible Data Compression with Assist Warps”
Proceedings of the 42nd International Symposium on Computer Architecture (ISCA), Portland, OR, June 2015.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]

Vivek Seshadri, Gennady Pekhimenko, Olatunji Ruwase, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry, and Trishul Chilimbi,
“Page Overlays: An Enhanced Virtual Memory Framework to Enable Fine-grained Memory Management”
Proceedings of the 42nd International Symposium on Computer Architecture (ISCA), Portland, OR, June 2015.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]

Junwhan Ahn, Sungjoo Yoo, Onur Mutlu, and Kiyoung Choi,
“PIM-Enabled Instructions: A Low-Overhead, Locality-Aware Processing-in-Memory Architecture”
Proceedings of the 42nd International Symposium on Computer Architecture (ISCA), Portland, OR, June 2015.
[Slides (pdf)] [Lightning Session Slides (pdf)]

Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, Onur Mutlu, and Kiyoung Choi,
“A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing”
Proceedings of the 42nd International Symposium on Computer Architecture (ISCA), Portland, OR, June 2015.
[Slides (pdf)] [Lightning Session Slides (pdf)]
Top Picks Honorable Mention by IEEE Micro.

Justin Meza, Qiang Wu, Sanjeev Kumar, and Onur Mutlu,
“A Large-Scale Study of Flash Memory Errors in the Field”
Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Portland, OR, June 2015.
[Slides (pptx) (pdf)] [Coverage at ZDNet] [Coverage on The Register] [Coverage on TechSpot] [Coverage on The Tech Report]

Yu Cai, Yixin Luo, Saugata Ghose, Erich F. Haratsch, Ken Mai, and Onur Mutlu,
“Read Disturb Errors in MLC NAND Flash Memory: Characterization and Mitigation”
Proceedings of the 45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Rio de Janeiro, Brazil, June 2015.
[Slides (pptx) (pdf)] [Poster (pdf)]

Justin Meza, Qiang Wu, Sanjeev Kumar, and Onur Mutlu,
“Revisiting Memory Errors in Large-Scale Production Data Centers: Analysis and Modeling of New Trends from the Field”
Proceedings of the 45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Rio de Janeiro, Brazil, June 2015.
[Slides (pptx) (pdf)] [DRAM Error Model]

Moinuddin Qureshi, Dae Hyun Kim, Samira Khan, Prashant Nair, and Onur Mutlu,
“AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems”
Proceedings of the 45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Rio de Janeiro, Brazil, June 2015.
[Slides (pptx) (pdf)]

Yixin Luo, Yu Cai, Saugata Ghose, Jongmoo Choi, and Onur Mutlu,
“WARM: Improving NAND Flash Memory Lifetime with Write-hotness Aware Retention Management”
Proceedings of the 31st International Conference on Massive Storage Systems and Technologies (MSST), Santa Clara, CA, June 2015.
[Slides (pptx) (pdf)] [Poster (pdf)]

Dongwoo Kang, Seungjae Baek, Jongmoo Choi, Donghee Lee, Sam H. Noh, and Onur Mutlu,
“Amnesic Cache Management for Non-Volatile Memory”
Proceedings of the 31st International Conference on Massive Storage Systems and Technologies (MSST), Santa Clara, CA, June 2015.
[Slides (pdf)]

Gennady Pekhimenko, Evgeny Bolotin, Mike O’Connor, Onur Mutlu, Todd C. Mowry, and Stephen W. Keckler,
“Toggle-Aware Compression for GPUs”
IEEE Computer Architecture Letters (CAL), May 2015.

Vivek Seshadri, Kevin Hsieh, Amirali Boroumand, Donghyuk Lee, Michael A. Kozuch, Onur Mutlu, Phillip B. Gibbons, and Todd C. Mowry,
“Fast Bulk Bitwise AND and OR in DRAM”
IEEE Computer Architecture Letters (CAL), April 2015.

Onur Mutlu and Rich Belgard,
“Introducing the MICRO Test of Time Awards: Concept, Process, 2014 Winners, and the Future”
IEEE Micro (IEEE MICRO), Vol. 35, No. 2, pages 85-87, March/April 2015.

Yoongu Kim, Weikun Yang, and Onur Mutlu,
“Ramulator: A Fast and Extensible DRAM Simulator”
IEEE Computer Architecture Letters (CAL), March 2015.
[Source Code]

Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, and Onur Mutlu,
“The Blacklisting Memory Scheduler: Balancing Performance, Fairness and Complexity”
SAFARI Technical Report, TR-SAFARI-2015-004, Carnegie Mellon University, March 2015.

Hiroyuki Usui, Lavanya Subramanian, Kevin Chang, and Onur Mutlu,
“SQUASH: Simple QoS-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators”
SAFARI Technical Report, TR-SAFARI-2015-003, Carnegie Mellon University, March 2015.

Hui Wang, Canturk Isci, Lavanya Subramanian, Jongmoo Choi, Depei Qian, and Onur Mutlu,
“A-DRM: Architecture-aware Distributed Resource Management of Virtualized Clusters”
Proceedings of the 11th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (VEE), Istanbul, Turkey, March 2015.
[Slides (pptx) (pdf)]

Azita Nouri, Reha Oguz Selvitopi, Ozcan Ozturk, Onur Mutlu, and Can Alkan,
“Massively Parallel Mapping of Next Generation Sequence Reads Using GPUs”
Short Student Research Competition Paper at the 20th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)Student Research Competition, Istanbul, Turkey, March 2015.
[Poster (pdf)] [Slides (pdf) (pptx)]

Gennady Pekhimenko, Evgeny Bolotin, Mike O’Connor, Onur Mutlu, Todd C. Mowry, and Stephen W. Keckler,
“Energy-Efficient Data Compression for GPU Memory Systems”
Short Student Research Competition Paper at the 20th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)Student Research Competition, Istanbul, Turkey, March 2015.
[Poster (pdf) (pptx)] [Slides (pdf) (pptx)]
First place in ACM Student Research Competition.

Onur Mutlu,
“Main Memory Scaling: Challenges and Solution Directions”
Invited Book Chapter in More than Moore Technologies for Next Generation Computer Design, pp. 127-153, Springer, 2015.

Yu Cai, Ken Mai, and Onur Mutlu,
“Comparative Evaluation of FPGA and ASIC Implementations of Bufferless and Buffered Routing Algorithms for On-Chip Networks”
Proceedings of the 16th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, March 2015.
[Slides (ppt) (pdf)]

Yu Cai, Yixin Luo, Erich F. Haratsch, Ken Mai, and Onur Mutlu,
“Data Retention in MLC NAND Flash Memory: Characterization, Optimization and Recovery”
Proceedings of the 21st International Symposium on High-Performance Computer Architecture (HPCA), Bay Area, CA, February 2015.
[Slides (pptx) (pdf)] [Poster (pdf)]
Best paper session.

Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Khan, Vivek Seshadri, Kevin Chang, and Onur Mutlu,
“Adaptive-Latency DRAM: Optimizing DRAM Timing for the Common-Case”
Proceedings of the 21st International Symposium on High-Performance Computer Architecture (HPCA), Bay Area, CA, February 2015.
[Slides (pptx) (pdf)] [Full data sets]

Gennady Pekhimenko, Tyler Huberty, Rui Cai, Onur Mutlu, Phillip P. Gibbons, Michael A. Kozuch, and Todd C. Mowry,
“Exploiting Compressed Block Size as an Indicator of Future Reuse”
Proceedings of the 21st International Symposium on High-Performance Computer Architecture (HPCA), Bay Area, CA, February 2015.
[Slides (pptx) (pdf)]

Amir Yazdanbakhsh, Gennady Pekhimenko, Bradley Thwaites, Hadi Esmaeilzadeh, Taesoo Kim, Onur Mutlu, and Todd C. Mowry
“RFVP: Rollback-Free Value Prediction with Safe-to-Approximate Loads”
SAFARI Technical Report, TR-SAFARI-2015-002, Carnegie Mellon University, February 2015.

Onur Mutlu, Justin Meza, and Lavanya Subramanian,
“The Main Memory System: Challenges and Opportunities”
Invited Article in Communications of the Korean Institute of Information Scientists and Engineers (KIISE), 2015.

Hongyi Xin, John Greth, John Emmons, Gennady Pekhimenko, Carl Kingsford, Can Alkan, and Onur Mutlu,
“Shifted Hamming Distance: A Fast and Accurate SIMD-friendly Filter to Accelerate Alignment Verification in Read Mapping”
Bioinformatics, [published online, January 10], 2015.
[PDF article] [Source Code]

Vivek Seshadri, Samihan Yedkar, Hongyi Xin, Onur Mutlu, Phillip P. Gibbons, Michael A. Kozuch, and Todd C. Mowry,
“Mitigating Prefetcher-Caused Pollution using Informed Caching Policies for Prefetched Blocks”
ACM Transactions on Architecture and Code Optimization (TACO), Vol. 11, No. 4, January 2015.
Presented at the 10th HiPEAC Conference, Amsterdam, Netherlands, January 2015.
[Slides (pptx) (pdf)]
[Source Code]

2014

HanBin Yoon, Justin Meza, Naveen Muralimanohar, Norman P. Jouppi, and Onur Mutlu,
“Efficient Data Mapping and Buffering Techniques for Multi-Level Cell Phase-Change Memories”
ACM Transactions on Architecture and Code Optimization (TACO), Vol. 11, No. 4, December 2014. [Slides (ppt) (pdf)]
Presented at the 10th HiPEAC Conference, Amsterdam, Netherlands, January 2015.
[Slides (ppt) (pdf)]
Best (student) presentation award.

Onur Kayiran, Nachiappan Chidambaram Nachiappan, Adwait Jog, Rachata Ausavarungnirun, Mahmut T. Kandemir, Gabriel H. Loh, Onur Mutlu, and Chita R. Das,
“Managing GPU Concurrency in Heterogeneous Architectures”
Proceedings of the 47th International Symposium on Microarchitecture (MICRO), Cambridge, UK, December 2014. [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pdf)]

Jishen Zhao, Onur Mutlu, and Yuan Xie,
“FIRM: Fair and High-Performance Memory Control for Persistent Memory Systems”
Proceedings of the 47th International Symposium on Microarchitecture (MICRO), Cambridge, UK, December 2014. [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]

Donghyuk Lee, Farhad Hormozdiari, Hongyi Xin, Faraz Hach, Onur Mutlu, and Can Alkan,
“Fast and Accurate Mapping of Complete Genomics Reads”
Methods, [epub October 22], 2014. [PDF article] [Source Code]

Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, and Onur Mutlu,
“The Blacklisting Memory Scheduler: Achieving High Performance and Fairness at Low Cost”
Proceedings of the 32nd IEEE International Conference on Computer Design (ICCD), Seoul, South Korea, October 2014. [Slides (pptx) (pdf)]
An extended version as SAFARI Technical Report, TR-SAFARI-2015-004, Carnegie Mellon University, March 2015.
[Source Code]

Youyou Lu, Jiwu Shu, Long Sun, and Onur Mutlu,
“Loose-Ordering Consistency for Persistent Memory”
Proceedings of the 32nd IEEE International Conference on Computer Design (ICCD), Seoul, South Korea, October 2014.
[Slides (pptx) (pdf)]
[Erratum]

Chris Fallin, Chris Wilkerson, and Onur Mutlu,
“The Heterogeneous Block Architecture”
Proceedings of the 32nd IEEE International Conference on Computer Design (ICCD), Seoul, South Korea, October 2014. [Slides (ppt) (pdf)]
An extended version as SAFARI Technical Report, TR-SAFARI-2014-001, Carnegie Mellon University, March 2014.

Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Chang, Greg Nazario, Reetuparna Das, Gabriel Loh, and Onur Mutlu,
“Design and Evaluation of Hierarchical Rings with Deflection Routing”
Proceedings of the 26th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Paris, France, October 2014. [Slides (pptx) (pdf)] [Source Code]

Onur Mutlu,
“Error Analysis and Management for MLC NAND Flash Memory”
Technical talk at Flash Memory Summit 2014 (FMS), Santa Clara, CA, August 2014. [Slides (ppt) (pdf)]

James A. Jablin, Thomas B. Jablin, Onur Mutlu, Maurice Herlihy,
“Warp-Aware Trace Scheduling for GPUs”
Proceedings of the 23rd International Conference on Parallel Architectures and Compilation Techniques (PACT), Edmonton, Alberta, Canada, August 2014. [Slides (pptx) (pdf)]

Bradley Thwaites, Gennady Pekhimenko, Amir Yazdanbakhsh, Girish Mururu, Jongse Park, Hadi Esmaeilzadeh, Onur Mutlu, and Todd C. Mowry,
“Rollback-Free Value Prediction with Approximate Loads”
Proceedings of the 23rd International Conference on Parallel Architectures and Compilation Techniques (PACT) Poster Session, Edmonton, Alberta, Canada, August 2014. [Poster (pdf) Poster (pptx)] [Slides (pdf) Slides (pptx)]

Hongyi Xin, John Greth, John Emmons, Gennady Pekhimenko, Carl Kingsford, Can Alkan, and Onur Mutlu,
“Shifted Hamming Distance (SHD): A Fast and Accurate SIMD-Friendly Filter for Local Alignment in Read Mapping”
High Throughput Sequencing Algorithms and Applications (HITSEQ) Poster Session, Boston, MA, July 2014. [Poster (pdf) (pptx)]

Yoongu Kim, Ross Daly, Jeremie Kim, Chris Fallin, Ji Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, and Onur Mutlu,
“Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors”
Proceedings of the 41st International Symposium on Computer Architecture (ISCA), Minneapolis, MN, June 2014.
[Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Source Code and Data] [RowHammer Summary Slides (pptx)] [RowHammer Summary]
[Coverage on ZDNet 1] [Coverage on ZDNet 2] [MemTest86 Hammer Test] [RowHammer Discussion Group] [Discussion on Twitter]

Vivek Seshadri, Abhishek Bhowmick, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, and Todd C. Mowry,
“The Dirty-Block Index”
Proceedings of the 41st International Symposium on Computer Architecture (ISCA), Minneapolis, MN, June 2014. [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]
[Source Code]

Yixin Luo, Sriram Govindan, Bikash Sharma, Mark Santaniello, Justin Meza, Aman Kansal, Jie Liu, Badriddine Khessib, Kushagra Vaid, and Onur Mutlu,
“Characterizing Application Memory Error Vulnerability to Optimize Data Center Cost via Heterogeneous-Reliability Memory”
Proceedings of the 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Atlanta, GA, June 2014. [Summary] [Slides (pptx) (pdf)] [Coverage on ZDNet]

Yu Cai, Gulay Yalcin, Onur Mutlu, Erich F. Haratsch, Osman Unsal, Adrian Cristal, and Ken Mai,
“Neighbor-Cell Assisted Error Correction for MLC NAND Flash Memories”
Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Austin, TX, June 2014. [Slides (ppt) (pdf)] [Poster (ppt)]

Samira Khan, Donghyuk Lee, Yoongu Kim, Alaa Alameldeen, Chris Wilkerson, and Onur Mutlu,
“The Efficacy of Error Mitigation Techniques for DRAM Retention Failures: A Comparative Experimental Study”
Proceedings of the ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), Austin, TX, June 2014. [Slides (pptx) (pdf)] [Poster (pptx) (pdf)] [Full data sets]

Yoongu Kim and Onur Mutlu,
“Memory Systems”
Invited Book Chapter in Computing Handbook, Third Edition: Computer Science and Software Engineering, CRC Press, April 2014.

Hyoseung Kim, Dionisio de Niz, Bjorn Andersson, Mark Klein, Onur Mutlu, and Ragunathan (Raj) Rajkumar,
“Bounding Memory Interference Delay in COTS-based Multi-Core Systems”
Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), Berlin, Germany, April 2014. [Slides (pptx) (pdf)]
Best paper award.

Chris Fallin, Chris Wilkerson, and Onur Mutlu,
“The Heterogeneous Block Architecture”
SAFARI Technical Report, TR-SAFARI-2014-001, Carnegie Mellon University, March 2014.

Kevin Chang, Donghyuk Lee, Zeshan Chishti, Alaa Alameldeen, Chris Wilkerson, Yoongu Kim, and Onur Mutlu,
“Improving DRAM Performance by Parallelizing Refreshes with Accesses”
Proceedings of the 20th International Symposium on High-Performance Computer Architecture (HPCA), Orlando, FL, February 2014. [Summary] [Slides (pptx) (pdf)]

Samira Khan, Alaa Alameldeen, Chris Wilkerson, Onur Mutlu, and Daniel Jimenez,
“Improving Cache Performance by Exploiting Read-Write Disparity”
Proceedings of the 20th International Symposium on High-Performance Computer Architecture (HPCA), Orlando, FL, February 2014. [Slides (pptx) (pdf)]
Best paper session.

Chris Fallin, Greg Nazario, Xiangyao Yu, Kevin Chang, Rachata Ausavarungnirun, and Onur Mutlu,
“Bufferless and Minimally-Buffered Deflection Routing”
Invited Book Chapter in Routing Algorithms in Networks-on-Chip, pp. 241-275, Springer, 2014.

2013

Gennady Pekhimenko, Tyler Huberty, Rui Cai, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, and Todd C. Mowry,
“Exploiting Compressed Block Size as an Indicator of Future Reuse”
SAFARI Technical Report, TR-SAFARI-2013-003, Carnegie Mellon University, December 2013.

Gennady Pekhimenko, Vivek Seshadri, Yoongu Kim, Hongyi Xin, Onur Mutlu, Michael A. Kozuch, Phillip B. Gibbons, and Todd C. Mowry,
“Linearly Compressed Pages: A Low-Complexity, Low-Latency Main Memory Compression Framework”
Proceedings of the 46th International Symposium on Microarchitecture (MICRO), Davis, CA, December 2013. [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] Poster (pptx) (pdf)]

Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, Onur Mutlu, Michael A. Kozuch, Phillip B. Gibbons, and Todd C. Mowry,
“RowClone: Fast and Energy-Efficient In-DRAM Bulk Data Copy and Initialization”
Proceedings of the 46th International Symposium on Microarchitecture (MICRO), Davis, CA, December 2013. [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)] [Poster (pptx) (pdf)]

Yu Cai, Onur Mutlu, Erich F. Haratsch, and Ken Mai,
“Program Interference in MLC NAND Flash Memory: Characterization, Modeling, and Mitigation”
Proceedings of the 31st IEEE International Conference on Computer Design (ICCD), Asheville, NC, October 2013. [Slides (pptx) (pdf)] [Lightning Session Slides (pdf)]

Youyou Lu, Jiwu Shu, Jia Guo, Shuai Li, and Onur Mutlu,
“LightTx: A Lightweight Transactional Design in Flash-based SSDs to Support Flexible Transactions”
Proceedings of the 31st IEEE International Conference on Computer Design (ICCD), Asheville, NC, October 2013. [Slides (pptx) (pdf)] [Lightning Session Slides (pptx) (pdf)]

Onur Mutlu,
“Memory Scaling: A Systems Architecture Perspective”
Technical talk at MemCon 2013 (MEMCON), Santa Clara, CA, August 2013. [Slides (pptx) (pdf)]
[Video] [Coverage on StorageSearch]

M. Aater Suleman and Onur Mutlu,
“Accelerating Critical Section Execution with Multicore Architectures”
Invited Book Chapter in Multicore Technology: Architecture, Reconfiguration, and Modeling, CRC Press, July 2013.

Justin Meza, Yixin Luo, Samira Khan, Jishen Zhao, Yuan Xie, and Onur Mutlu,
“A Case for Efficient Hardware-Software Cooperative Management of Storage and Memory”
Proceedings of the 5th Workshop on Energy-Efficient Design (WEED), Tel-Aviv, Israel, June 2013. Slides (pptx) Slides (pdf)

Jamie Liu, Ben Jaiyen, Yoongu Kim, Chris Wilkerson, and Onur Mutlu,
“An Experimental Study of Data Retention Behavior in Modern DRAM Devices: Implications for Retention Time Profiling Mechanisms”
Proceedings of the 40th International Symposium on Computer Architecture (ISCA), Tel-Aviv, Israel, June 2013. Slides (ppt) Slides (pdf)

Jose A. Joao, M. Aater Suleman, Onur Mutlu, and Yale N. Patt,
“Utility-Based Acceleration of Multithreaded Applications on Asymmetric CMPs”
Proceedings of the 40th International Symposium on Computer Architecture (ISCA), Tel-Aviv, Israel, June 2013. Slides (ppt) Slides (pdf)

Adwait Jog, Onur Kayiran, Asit K. Mishra, Mahmut T. Kandemir, Onur Mutlu, Ravishankar Iyer, and Chita R. Das,
“Orchestrated Scheduling and Prefetching for GPGPUs”
Proceedings of the 40th International Symposium on Computer Architecture (ISCA), Tel-Aviv, Israel, June 2013. Slides (pptx) Slides (pdf)

Asit K. Mishra, Onur Mutlu, and Chita R. Das,
“A Heterogeneous Multiple Network-on-Chip Design: An Application-Aware Approach”
Proceedings of the 50th Design Automation Conference (DAC), Austin, TX, June 2013. Slides (pptx) Slides (pdf)

Onur Mutlu,
“Memory Scaling: A Systems Architecture Perspective”
Proceedings of the 5th International Memory Workshop (IMW), Monterey, CA, May 2013. Slides (pptx) (pdf)
EETimes Reprint

Yu Cai, Gulay Yalcin, Onur Mutlu, Erich F. Haratsch, Adrian Cristal, Osman Unsal, and Ken Mai,
“Error Analysis and Retention-Aware Error Management for NAND Flash Memory”
Intel Technology Journal (ITJ) Special Issue on Memory Resiliency, Vol. 17, No. 1, May 2013.

Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry,
“RowClone: Fast and Efficient In-DRAM Copy and Initialization of Bulk Data”
CMU Computer Science Technical Report, CMU-CS-13-108, Carnegie Mellon University, April 2013.

HanBin Yoon, Naveen Muralimanohar, Justin Meza, Onur Mutlu, and Norman P. Jouppi,
“Techniques for Data Mapping and Buffering to Exploit Asymmetry in Multi-Level Cell (Phase Change) Memory”
SAFARI Technical Report, TR-SAFARI-2013-002, Carnegie Mellon University, May 2013.

Alexey Tumanov, Joshua Wise, Onur Mutlu, and Gregory R. Ganger,
“Asymmetry-Aware Execution Placement on Manycore Chips”
Proceedings of the 3rd Workshop on Systems for Future Multicore Architectures (SFMA), Prague, Czech Republic, April 2013. Slides (pdf)

Emre Kultursay, Mahmut Kandemir, Anand Sivasubramaniam, and Onur Mutlu,
“Evaluating STT-RAM as an Energy-Efficient Main Memory Alternative”
Proceedings of the 2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Austin, TX, April 2013. Slides (pptx) (pdf)

Yu Cai, Erich F. Haratsch, Onur Mutlu, and Ken Mai,
“Threshold Voltage Distribution in MLC NAND Flash Memory: Characterization, Analysis and Modeling”
Proceedings of the Design, Automation, and Test in Europe Conference (DATE), Grenoble, France, March 2013. Slides (ppt)

Adwait Jog, Onur Kayiran, Nachiappan Chidambaram Nachiappan, Asit K. Mishra, Mahmut T. Kandemir, Onur Mutlu, Ravishankar Iyer, and Chita R. Das,
“OWL: Cooperative Thread Array Aware Scheduling Techniques for Improving GPGPU Performance”
Proceedings of the 18th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Houston, TX, March 2013. Slides (pptx)

Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, and Onur Mutlu,
“Tiered-Latency DRAM: A Low Latency and Low Cost DRAM Architecture”
Proceedings of the 19th International Symposium on High-Performance Computer Architecture (HPCA), Shenzhen, China, February 2013. Slides (pptx)

Lavanya Subramanian, Vivek Seshadri, Yoongu Kim, Ben Jaiyen, and Onur Mutlu,
“MISE: Providing Performance Predictability and Improving Fairness in Shared Main Memory Systems”
Proceedings of the 19th International Symposium on High-Performance Computer Architecture (HPCA), Shenzhen, China, February 2013. Slides (pptx)

Reetuparna Das, Rachata Ausavarungnirun, Onur Mutlu, Akhilesh Kumar, and Mani Azimi,
“Application-to-Core Mapping Policies to Reduce Memory System Interference in Multi-Core Systems”
Proceedings of the 19th International Symposium on High-Performance Computer Architecture (HPCA), Shenzhen, China, February 2013. Slides (pptx)

Hongyi Xin, Donghyuk Lee, Farhad Hormozdiari, Samihan Yedkar, Onur Mutlu, and Can Alkan,
“Accelerating Read Mapping with FastHASH”
BMC Genomics, 14(Suppl 1):S13, 21 January 2013. PDF article
also appears in Proceedings of the 11th Asia Pacific Bioinformatics Conference (APBC), Vancouver, BC, Canada, January 2013. Slides (pptx) Source Code

2012

Onur Mutlu,
“Message from the Micro-45 Program Chair”
Proceedings of the 45th International Symposium on Microarchitecture (MICRO), Vancouver, BC, Canada, December 2012. Slides (pdf)

Chris Fallin, Xiangyao Yu, Kevin Chang, Rachata Ausavarungnirun, Greg Nazario, Reetuparna Das, and Onur Mutlu,
“HiRD: A Low-Complexity, Energy-Efficient Hierarchical Ring Interconnect”
SAFARI Technical Report, TR-SAFARI-2012-004, Carnegie Mellon University, December 2012.

Justin Meza, Jing Li, and Onur Mutlu,
“Evaluating Row Buffer Locality in Future Non-Volatile Main Memories”
SAFARI Technical Report, TR-SAFARI-2012-002, Carnegie Mellon University, December 2012.

Kevin Chang, Rachata Ausavarungnirun, Chris Fallin, and Onur Mutlu,
“HAT: Heterogeneous Adaptive Throttling for On-Chip Networks”
Proceedings of the 24th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), New York, NY, October 2012. Slides (pptx) (pdf)

Gennady Pekhimenko, Vivek Seshadri, Yoongu Kim, Hongyi Xin, Onur Mutlu, Michael A. Kozuch, Phillip B. Gibbons, and Todd C. Mowry,
“Linearly Compressed Pages: A Main Memory Compression Framework with Low Complexity and Low Latency”
SAFARI Technical Report, TR-SAFARI-2012-005, Carnegie Mellon University, September 2012.

HanBin Yoon, Justin Meza, Rachata Ausavarungnirun, Rachael Harding, and Onur Mutlu,
“Row Buffer Locality Aware Caching Policies for Hybrid Memories”
Proceedings of the 30th IEEE International Conference on Computer Design (ICCD), Montreal, Quebec, Canada, September 2012. Slides (pptx) (pdf)
Best paper award (in Computer Systems and Applications track).

Yu Cai, Gulay Yalcin, Onur Mutlu, Erich F. Haratsch, Adrian Cristal, Osman Unsal, and Ken Mai,
“Flash Correct-and-Refresh: Retention-Aware Error Management for Increased Flash Memory Lifetime”
Proceedings of the 30th IEEE International Conference on Computer Design (ICCD), Montreal, Quebec, Canada, September 2012. Slides (ppt) (pdf)

Justin Meza, Jing Li, and Onur Mutlu,
“A Case for Small Row Buffers in Non-Volatile Main Memories”
Proceedings of the 30th IEEE International Conference on Computer Design (ICCD) Poster Session, Montreal, Quebec, Canada, September 2012. Poster (pdf) Poster (ppt)
An extended version as SAFARI Technical Report, TR-SAFARI-2010-002, Carnegie Mellon University, December 2012.

Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu, Philip B. Gibbons, Michael A. Kozuch, and Todd C. Mowry,
“Base-Delta-Immediate Compression: Practical Data Compression for On-Chip Caches”
Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques (PACT), Minneapolis, MN, September 2012. Slides (pptx) Source Code

Vivek Seshadri, Onur Mutlu, Michael A. Kozuch, and Todd C. Mowry,
“The Evicted-Address Filter: A Unified Mechanism to Address Both Cache Pollution and Thrashing”
Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques (PACT), Minneapolis, MN, September 2012. Slides (pptx) Source Code

Reetuparna Das, Rachata Ausavarungnirun, Onur Mutlu, Akhilesh Kumar, and Mani Azimi,
“Application-to-Core Mapping Policies to Reduce Memory Interference in Multi-Core Systems”
Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques (PACT) Poster Session, Minneapolis, MN, September 2012. Poster (pdf)Poster (pptx)

Nachiappan Chidambaram Nachiappan, Asit K. Mishra, Mahmut Kandemir, Anand Sivasubramaniam, Onur Mutlu, and Chita R. Das,
“Application-aware Prefetch Prioritization in On-chip Networks”
Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques (PACT) Poster Session, Minneapolis, MN, September 2012.

Gennady Pekhimenko, Todd C. Mowry, Onur Mutlu,
“Linearly Compressed Pages: A Main Memory Compression Framework with Low Complexity and Low Latency”
Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques (PACT) Student Research Competition, Minneapolis, MN, September 2012. Poster (pdf) Poster (pptx) Slides (pdf) Slides (pptx)
Second place in ACM Student Research Competition.

George Nychis, Chris Fallin, Thomas Moscibroda, Onur Mutlu, and Srinivasan Seshan,
“On-Chip Networks from a Networking Perspective: Congestion and Scalability in Many-core Interconnects”
Proceedings of the 2012 ACM SIGCOMM Conference (SIGCOMM), Helsinki, Finland, August 2012. Slides (pptx)

Jamie Liu, Ben Jaiyen, Richard Veras, and Onur Mutlu,
“RAIDR: Retention-Aware Intelligent DRAM Refresh”
Proceedings of the 39th International Symposium on Computer Architecture (ISCA), Portland, OR, June 2012. Slides (pdf)

Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, and Onur Mutlu,
“A Case for Exploiting Subarray-Level Parallelism (SALP) in DRAM”
Proceedings of the 39th International Symposium on Computer Architecture (ISCA), Portland, OR, June 2012. Slides (pptx)

Rachata Ausavarungnirun, Kevin Chang, Lavanya Subramanian, Gabriel Loh, and Onur Mutlu,
“Staged Memory Scheduling: Achieving High Performance and Scalability in Heterogeneous Systems”
Proceedings of the 39th International Symposium on Computer Architecture (ISCA), Portland, OR, June 2012. Slides (pptx)

Onur Mutlu,
“Message from the MSPC 2012 Program Chair”
Proceedings of the ACM SIGPLAN Workshop on Memory Systems Performance and Correctness (MSPC), Beijing, China, June 2012. Slides (pdf)

Boris Grot, Joel Hestness, Stephen W. Keckler, and Onur Mutlu,
“A QoS-Enabled On-Die Interconnect Fabric for Kilo-Node Chips”
IEEE Micro, Special Issue: Micro’s Top Picks from 2011 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 32, No. 3, May/June 2012.

Chris Fallin, Greg Nazario, Xiangyao Yu, Kevin Chang, Rachata Ausavarungnirun, and Onur Mutlu,
“MinBD: Minimally-Buffered Deflection Routing for Energy-Efficient Interconnect”
Proceedings of the 6th ACM/IEEE International Symposium on Networks on Chip (NOCS), Lyngby, Denmark, May 2012. Slides (pptx) (pdf)
One of the five papers nominated for the Best Paper Award by the Program Committee.

Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, and Yale N. Patt,
“Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems”
ACM Transactions on Computer Systems (TOCS), April 2012.
A previous version as HPS Technical Report, TR-HPS-2012-001, February 2012.

Yu Cai, Erich F. Haratsch, Onur Mutlu, and Ken Mai,
“Error Patterns in MLC NAND Flash Memory: Measurement, Characterization, and Analysis”
Proceedings of the Design, Automation, and Test in Europe Conference (DATE), Dresden, Germany, March 2012. Slides (ppt)

Jose A. Joao, M. Aater Suleman, Onur Mutlu, and Yale N. Patt,
“Bottleneck Identification and Scheduling in Multithreaded Applications”
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), London, UK, March 2012. Slides (ppt) (pdf)

Justin Meza, Jichuan Chang, HanBin Yoon, Onur Mutlu, and Parthasarathy Ranganathan,
“Enabling Efficient and Scalable Hybrid Memories Using Fine-Granularity DRAM Cache Management”
IEEE Computer Architecture Letters (CAL), February 2012.

Onur Mutlu,
“Some Ideas and Principles for Achieving Higher System Energy Efficiency”
Presented at the NSF Workshop on Cross-Layer Power Optimization and Management (NSF CPOM), Los Angeles, CA, February 2012.
Slides (ppt)

Hongyi Xin, Donghyuk Lee, Farhad Hormozdiari, Can Alkan, and Onur Mutlu,
“FastHASH: A New GPU-friendly Algorithm for Fast and Comprehensive Next-generation Sequence Mapping”
Pacific Symposium on Biocomputing (PSB) Poster Session, Hawaii, January 2012. Poster (pdf) Abstract (pdf) Slides (pdf) Source Code

2011

Sai Prashanth Muralidhara, Lavanya Subramanian, Onur Mutlu, Mahmut Kandemir, and Thomas Moscibroda,
“Reducing Memory Interference in Multicore Systems via Application-Aware Memory Channel Partitioning”
Proceedings of the 44th International Symposium on Microarchitecture (MICRO), Porto Alegre, Brazil, December 2011. Slides (pptx)

Eiman Ebrahimi, Rustam Miftakhutdinov, Chris Fallin, Chang Joo Lee, Onur Mutlu, and Yale N. Patt,
“Parallel Application Memory Scheduling”
Proceedings of the 44th International Symposium on Microarchitecture (MICRO), Porto Alegre, Brazil, December 2011. Slides (pptx)

Veynu Narasiman, Chang Joo Lee, Michael Shebanow, Rustam Miftakhutdinov, Onur Mutlu, and Yale N. Patt,
“Improving GPU Performance via Large Warps and Two-Level Warp Scheduling”
Proceedings of the 44th International Symposium on Microarchitecture (MICRO), Porto Alegre, Brazil, December 2011. Slides (ppt)
A previous version as HPS Technical Report, TR-HPS-2010-006, December 2010.

Chang Joo Lee, Onur Mutlu, Veynu Narasiman, and Yale N. Patt,
“Prefetch-Aware Memory Controllers”
IEEE Transactions on Computers (TC), Vol. 60, No. 10, pages 1406-1430, October 2011.

Chris Fallin, Xiangyao Yu, Greg Nazario, and Onur Mutlu,
“A High-Performance Hierarchical Ring On-Chip Interconnect with Low-Cost Routers”
SAFARI Technical Report, TR-SAFARI-2011-007, Carnegie Mellon University, September 2011.

Chris Craik and Onur Mutlu,
“Investigating the Viability of Bufferless NoCs in Modern Chip Multi-Processor Systems”
SAFARI Technical Report, TR-SAFARI-2011-004, Carnegie Mellon University, August 2011.

Boris Grot, Joel Hestness, Stephen W. Keckler, and Onur Mutlu,
“Kilo-NOC: A Heterogeneous Network-on-Chip Architecture for Scalability and Service Guarantees”
Proceedings of the 38th International Symposium on Computer Architecture (ISCA), San Jose, CA, June 2011. Slides (pptx)
One of the 12 computer architecture papers of 2011 selected as Top Picks by IEEE Micro.

Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, and Yale N. Patt,
“Prefetch-Aware Shared Resource Management for Multi-Core Systems”
Proceedings of the 38th International Symposium on Computer Architecture (ISCA), San Jose, CA, June 2011. Slides (pptx)

Onur Mutlu,
“Memory Systems in the Many-Core Era: Challenges, Opportunities, and Solution Directions”
Joint Keynote Talk at ISMM (International Symposium on Memory Management) and MSPC (ACM Workshop on Memory System Performance and Correctness), San Jose, CA, June 2011.
Abstract Slides (pptx) Slides (pdf)

Howard David, Chris Fallin, Eugene Gorbatov, Ulf R. Hanebutte, and Onur Mutlu,
“Memory Power Management via Dynamic Voltage/Frequency Scaling”
Proceedings of the 8th International Conference on Autonomic Computing (ICAC), Karlsruhe, Germany, June 2011. Slides (pptx) (pdf)

Michael Papamichael, James C. Hoe, and Onur Mutlu,
“FIST: A Fast, Lightweight, FPGA-Friendly Packet Latency Estimator for NoC Modeling in Full-System Simulations”
Proceedings of the 5th ACM/IEEE International Symposium on Networks on Chip (NOCS), Pittsburgh, PA, May 2011. Slides (pdf)

Chris Fallin, Chris Craik, and Onur Mutlu,
“CHIPPER: A Low-Complexity Bufferless Deflection Router”
Proceedings of the 17th International Symposium on High-Performance Computer Architecture (HPCA), pages 144-155, San Antonio, TX, February 2011. Slides (pptx)
An extended version as SAFARI Technical Report, TR-SAFARI-2010-001, Carnegie Mellon University, December 2010.

Yale N. Patt and Onur Mutlu,
“Top Picks: Guest Editors’ Introduction”
IEEE Micro, Special Issue: Micro’s Top Picks from 2010 Computer Architecture Conferences (IEEE MICRO), Vol. 31, No. 1, pages 6-10, January/February 2011.

M. Aater Suleman, Onur Mutlu, Jose A. Joao, Khubaib, and Yale N. Patt,
“Data Marshaling for Multi-core Systems”
IEEE Micro, Special Issue: Micro’s Top Picks from 2010 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 31, No. 1, pages 56-64, January/February 2011.

Reetuparna Das, Onur Mutlu, Thomas Moscibroda, and Chita R. Das,
“Aergia: A Network-on-Chip Exploiting Packet Latency Slack”
IEEE Micro, Special Issue: Micro’s Top Picks from 2010 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 31, No. 1, pages 29-41, January/February 2011.

Yoongu Kim, Michael Papamichael, Onur Mutlu, and Mor Harchol-Balter,
“Thread Cluster Memory Scheduling”
IEEE Micro, Special Issue: Micro’s Top Picks from 2010 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 31, No. 1, pages 78-89, January/February 2011.

2010

Yoongu Kim, Michael Papamichael, Onur Mutlu, and Mor Harchol-Balter,
“Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior”
Proceedings of the 43rd International Symposium on Microarchitecture (MICRO), pages 65-76, Atlanta, GA, December 2010. Slides (pptx) (pdf)
One of the 11 computer architecture papers of 2010 selected as Top Picks by IEEE Micro.

George Nychis, Chris Fallin, Thomas Moscibroda, and Onur Mutlu,
“Next Generation On-Chip Networks: What Kind of Congestion Control Do We Need?”
Proceedings of the 9th ACM Workshop on Hot Topics in Networks (HOTNETS), Monterey, CA, October 2010. Slides (ppt) (key)

Tanausu Ramirez, Alex Pajuelo, Oliverio Santana, Onur Mutlu, and Mateo Valero,
“Efficient Runahead Threads”
Proceedings of the 19th ACM International Conference on Parallel Architectures and Compilation Techniques (PACT), pages 443-452, Vienna, Austria, September 2010. Slides (pdf)

Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger,
“Phase Change Memory Architecture and the Quest for Scalability”
Communications of the ACM (CACM), Research Highlight, Vol. 53, No. 7, pages 99-106, July 2010.

Reetuparna Das, Onur Mutlu, Thomas Moscibroda, and Chita R. Das,
“Aergia: Exploiting Packet Latency Slack in On-Chip Networks”
Proceedings of the 37th International Symposium on Computer Architecture (ISCA), pages 106-116, Saint-Malo, France, June 2010. Slides (pptx)
One of the 11 computer architecture papers of 2010 selected as Top Picks by IEEE Micro.

M. Aater Suleman, Onur Mutlu, Jose A. Joao, Khubaib, and Yale N. Patt,
“Data Marshaling for Multi-core Architectures”
Proceedings of the 37th International Symposium on Computer Architecture (ISCA), pages 441-450, Saint-Malo, France, June 2010. Slides (ppt)
One of the 11 computer architecture papers of 2010 selected as Top Picks by IEEE Micro.

Boris Grot, Stephen W. Keckler, and Onur Mutlu,
“Topology-aware Quality-of-Service Support in Highly Integrated Chip Multiprocessors”
Proceedings of the 6th Annual Workshop on the Interaction between Operating Systems and Computer Architecture (WIOSCA), Saint-Malo, France, June 2010. Slides (pptx)

Paul Bogdan, Miray Kas, Radu Marculescu, and Onur Mutlu,
“QuaLe: A Quantum-Leap Inspired Model for Non-Stationary Analysis of NoC Traffic in Multi-Processor Platforms”
Proceedings of the 4th ACM/IEEE International Symposium on Networks on Chip (NOCS), pages 241-248, Grenoble, France, May 2010.

Yanjing Li, Onur Mutlu, Donald S. Gardner, and Subhasish Mitra,
“Concurrent Autonomous Self-Test for Uncore Components in System-on-Chips”
Proceedings of the 28th IEEE VLSI Test Symposium (VTS), pages 232-237, Santa Cruz, CA, April 2010. Slides (ppt)
Best paper award.

Chang Joo Lee, Veynu Narasiman, Eiman Ebrahimi, Onur Mutlu, and Yale N. Patt,
“DRAM-Aware Last-Level Cache Writeback: Reducing Write-Caused Interference in Memory Systems”
HPS Technical Report, TR-HPS-2010-002, April 2010.

Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, and Yale N. Patt,
“Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems”
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 335-346, Pittsburgh, PA, March 2010. Slides (pdf)
Best paper award.

Onur Mutlu,
“Asymmetry Everywhere (with Automatic Resource Management)”
CRA Workshop on Advancing Computer Architecture Research: Popular Parallel Programming (NSF ACAR), San Diego, CA, February 2010.
Position paper

Yoongu Kim, Dongsu Han, Onur Mutlu, and Mor Harchol-Balter,
“ATLAS: A Scalable and High-Performance Scheduling Algorithm for Multiple Memory Controllers”
Proceedings of the 16th International Symposium on High-Performance Computer Architecture (HPCA), Bangalore, India, January 2010. Slides (pptx)
Best paper session. One of the four papers nominated for the Best Paper Award by the Program Committee.

Benjamin C. Lee, Ping Zhou, Jun Yang, Youtao Zhang, Bo Zhao, Engin Ipek, Onur Mutlu, and Doug Burger,
“Phase Change Technology and the Future of Main Memory”
IEEE Micro, Special Issue: Micro’s Top Picks from 2009 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 30, No. 1, pages 60-70, January/February 2010.

M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, and Yale N. Patt,
“Accelerating Critical Section Execution with Asymmetric Multi-Core Architectures”
IEEE Micro, Special Issue: Micro’s Top Picks from 2009 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 30, No. 1, pages 131-141, January/February 2010.

2009

Reetuparna Das, Onur Mutlu, Thomas Moscibroda, and Chita R. Das,
“Application-Aware Prioritization Mechanisms for On-Chip Networks”
Proceedings of the 42nd International Symposium on Microarchitecture (MICRO), pages 280-291, New York, NY, December 2009. Slides (pptx)

Eiman Ebrahimi, Onur Mutlu, Chang Joo Lee, and Yale N. Patt,
“Coordinated Control of Multiple Prefetchers in Multi-Core Systems”
Proceedings of the 42nd International Symposium on Microarchitecture (MICRO), pages 316-326, New York, NY, December 2009. Slides (ppt)

Boris Grot, Stephen W. Keckler, and Onur Mutlu,
“Preemptive Virtual Clock: A Flexible, Efficient, and Cost-effective QOS Scheme for Networks-on-Chip”
Proceedings of the 42nd International Symposium on Microarchitecture (MICRO), pages 268-279, New York, NY, December 2009. Slides (pdf)

Chang Joo Lee, Veynu Narasiman, Onur Mutlu, and Yale N. Patt,
“Improving Memory Bank-Level Parallelism in the Presence of Prefetching”
Proceedings of the 42nd International Symposium on Microarchitecture (MICRO), pages 327-336, New York, NY, December 2009. Slides (ppt)

Yanjing Li, Onur Mutlu, and Subhasish Mitra,
“Operating System Scheduling for Efficient Online Self-Test in Robust Systems”
Proceedings of the International Conference on Computer-Aided Design (ICCAD), pages 201-208, San Jose, CA, November 2009. Slides (ppt) (pdf)

Can Alkan, Jeffrey M. Kidd, Tomas Marques-Bonet, Gozde Aksay, Francesca Antonacci, Fereydoun Hormozdiari, Jacob O. Kitzman, Carl Baker, Maika Malig, Onur Mutlu, S. Cenk Sahinalp, Richard A. Gibbs, and Evan E. Eichler,
“Personalized copy number and segmental duplication maps using next-generation sequencing”
Nature Genetics, August 30, [Epub ahead of print], Vol. 41, No. 10, pages 1061-1067, October 2009. Source Code

Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, and Robert S. Cohn,
“Virtual Program Counter (VPC) Prediction: Very Low Cost Indirect Branch Prediction using Conditional Branch Prediction Hardware”
IEEE Transactions on Computers (TC), Vol. 58, No. 9, pages 1153-1170, September 2009.

Kypros Constantinides, Onur Mutlu, Todd Austin, and Valeria Bertacco,
“A Flexible Software-Based Framework for Online Detection of Hardware Defects”
IEEE Transactions on Computers (TC), Vol. 58, No. 8, pages 1063-1079, August 2009.

Thomas Moscibroda and Onur Mutlu,
“A Case for Bufferless Routing in On-Chip Networks”
Proceedings of the 36th International Symposium on Computer Architecture (ISCA), pages 196-207, Austin, TX, June 2009. Slides (pptx)

Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger,
“Architecting Phase Change Memory as a Scalable DRAM Alternative”
Proceedings of the 36th International Symposium on Computer Architecture (ISCA), pages 2-13, Austin, TX, June 2009. Slides (pdf)
One of the 13 computer architecture papers of 2009 selected as Top Picks by IEEE Micro.
Selected as a CACM Research Highlight.

José A. Joao, Onur Mutlu, and Yale N. Patt,
“Flexible Reference Counting-Based Hardware Acceleration for Garbage Collection”
Proceedings of the 36th International Symposium on Computer Architecture (ISCA), pages 418-428, Austin, TX, June 2009. Slides (ppt) (pdf)

M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, and Yale N. Patt,
“Accelerating Critical Section Execution with Asymmetric Multi-Core Architectures”
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 253-264, Washington, DC, March 2009. Slides (ppt)
One of the 13 computer architecture papers of 2009 selected as Top Picks by IEEE Micro.

Eiman Ebrahimi, Onur Mutlu, and Yale N. Patt,
“Techniques for Bandwidth-Efficient Prefetching of Linked Data Structures in Hybrid Prefetching Systems”
Proceedings of the 15th International Symposium on High-Performance Computer Architecture (HPCA), pages 7-17, Raleigh, NC, February 2009. Slides (ppt)
Best paper session. One of the three papers nominated for the Best Paper Award by the Program Committee.

Boris Grot, Joel Hestness, Stephen W. Keckler, and Onur Mutlu,
“Express Cube Topologies for On-Chip Interconnects”
Proceedings of the 15th International Symposium on High-Performance Computer Architecture (HPCA), pages 163-174, Raleigh, NC, February 2009. Slides (ppt)

Onur Mutlu and Thomas Moscibroda,
“Parallelism-Aware Batch Scheduling: Enabling High-Performance and Fair Memory Controllers”
IEEE Micro, Special Issue: Micro’s Top Picks from 2008 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 29, No. 1, pages 22-32, January/February 2009.

2008

Kypros Constantinides, Onur Mutlu, and Todd Austin,
“Online Design Bug Detection: RTL Analysis, Flexible Mechanisms, and Evaluation”
Proceedings of the 41st International Symposium on Microarchitecture (MICRO), pages 282-293, Lake Como, Italy, November 2008. Slides (ppt)

Chang Joo Lee, Onur Mutlu, Veynu Narasiman, and Yale N. Patt,
“Prefetch-Aware DRAM Controllers”
Proceedings of the 41st International Symposium on Microarchitecture (MICRO), pages 200-209, Lake Como, Italy, November 2008. Slides (ppt)
An extended version as HPS Technical Report, TR-HPS-2008-002, University of Texas at Austin, September 2008.

Thomas Moscibroda and Onur Mutlu,
“Distributed Order Scheduling and its Application to Multi-Core DRAM Controllers”
Proceedings of the 27th Symposium on Principles of Distributed Computing (PODC), pages 365-374, Toronto, ON, Canada, August 2008. Slides (pptx)
Best Presentation Award.

Onur Mutlu and Thomas Moscibroda,
“Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems”
Proceedings of the 35th International Symposium on Computer Architecture (ISCA), pages 63-74, Beijing, China, June 2008. [Summary] [Slides (ppt)]
One of the 12 computer architecture papers of 2008 selected as Top Picks by IEEE Micro.

Engin Ipek, Onur Mutlu, José F. Martínez, and Rich Caruana,
“Self Optimizing Memory Controllers: A Reinforcement Learning Approach”
Proceedings of the 35th International Symposium on Computer Architecture (ISCA), pages 39-50, Beijing, China, June 2008. Slides (pptx)

Sangyeun Cho, Tao Li, and Onur Mutlu,
“Interaction of Many-core Computer Architecture and Operating Systems: Guest Editors’ Introduction”
IEEE Micro Special Issue (IEEE MICRO), Vol. 28, No. 3, pages 2-5, May/June 2008.

José A. Joao, Onur Mutlu, Hyesoon Kim, Rishi Agarwal, and Yale N. Patt,
“Improving the Performance of Object-Oriented Languages with Dynamic Predication of Indirect Jumps”
Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 80-90, Seattle, WA, March 2008. Slides (ppt) (pdf)

Chang Joo Lee, Hyesoon Kim, Onur Mutlu, and Yale N. Patt,
“Performance-Aware Speculation Control using Wrong Path Usefulness Prediction”
Proceedings of the 14th International Symposium on High-Performance Computer Architecture (HPCA), pages 39-49, Salt Lake City, UT, February 2008. Slides (ppt)

2007

Onur Mutlu and Thomas Moscibroda,
“Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors”
Proceedings of the 40th International Symposium on Microarchitecture (MICRO), pages 146-158, Chicago, IL, December 2007. [Summary] [Slides (ppt)]

Kypros Constantinides, Onur Mutlu, Todd Austin, and Valeria Bertacco,
“Software-Based Online Detection of Hardware Defects: Mechanisms, Architectural Support, and Evaluation”
Proceedings of the 40th International Symposium on Microarchitecture (MICRO), pages 97-108, Chicago, IL, December 2007. Slides (ppt)

Thomas Moscibroda and Onur Mutlu,
“Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems”
Proceedings of the 16th USENIX Security Symposium (USENIX SECURITY), pages 257-274, Boston, MA, August 2007. Slides (ppt)

Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, and Robert S. Cohn,
“VPC Prediction: Reducing the Cost of Indirect Branches via Hardware-Based Dynamic Devirtualization”
Proceedings of the 34th International Symposium on Computer Architecture (ISCA), pages 424-435, San Diego, CA, June 2007. Slides (ppt)
An extended version including evaluation of object-oriented Java applications, as HPS Technical Report, TR-HPS-2007-002, University of Texas at Austin, March 2007.

José A. Joao, Onur Mutlu, Hyesoon Kim, and Yale N. Patt,
“Dynamic Predication of Indirect Jumps”
IEEE Computer Architecture Letters (CAL), Vol. 6(2), pages 25-28, May 2007.

Hyesoon Kim, José A. Joao, Onur Mutlu, and Yale N. Patt,
“Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors”
Proceedings of the 5th International Symposium on Code Generation and Optimization (CGO), pages 367-378, San Jose, CA, March 2007. Slides (ppt) (pdf)

Santhosh Srinath, Onur Mutlu, Hyesoon Kim, and Yale N. Patt,
“Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers”
Proceedings of the 13th International Symposium on High-Performance Computer Architecture (HPCA), pages 63-74, Phoenix, AZ, February 2007. Slides (ppt)
One of the five papers nominated for the Best Paper Award by the Program Committee.

Hyesoon Kim, José A. Joao, Onur Mutlu, and Yale N. Patt,
“Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication”
IEEE Micro, Special Issue: Micro’s Top Picks from 2006 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 27, No. 1, pages 94-104, January/February 2007.

2006

Hyesoon Kim, José A. Joao, Onur Mutlu, and Yale N. Patt,
“Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths”
Proceedings of the 39th International Symposium on Microarchitecture (MICRO), pages 53-64, Orlando, FL, December 2006. Slides (ppt)
One of the 11 computer architecture papers of 2006 selected as Top Picks by IEEE Micro.
Nominated for the Best Paper Award. 
An extended version as HPS Technical Report, TR-HPS-2006-008, University of Texas at Austin, September 2006.

Onur Mutlu, Hyesoon Kim, and Yale N. Patt,
“Address-Value Delta (AVD) Prediction: A Hardware Technique for Efficiently Parallelizing Dependent Cache Misses”
IEEE Transactions on Computers (TC), Vol. 55, No. 12, pages 1491-1508, December 2006.

Onur Mutlu,
“Efficient Runahead Execution Processors”
Ph.D. Dissertation, HPS Technical Report, TR-HPS-2006-007, July 2006. Slides (ppt)
Nominated for the ACM Doctoral Dissertation Award by the University of Texas at Austin.

Moinuddin K. Qureshi, Daniel N. Lynch, Onur Mutlu, and Yale N. Patt,
“A Case for MLP-Aware Cache Replacement”
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA), pages 167-177, Boston, MA, June 2006. Slides (ppt)

Hyesoon Kim, M. Aater Suleman, Onur Mutlu, and Yale N. Patt,
“2D-Profiling: Detecting Input-Dependent Branches with a Single Input Data Set”
Proceedings of the 4th International Symposium on Code Generation and Optimization (CGO), pages 159-169, New York, NY, March 2006. Slides (ppt) Slides (pdf)
An extended version as HPS Technical Report, TR-HPS-2006-001, University of Texas at Austin, January 2006.

Onur Mutlu, Hyesoon Kim, and Yale N. Patt,
“Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance”
IEEE Micro, Special Issue: Micro’s Top Picks from Microarchitecture Conferences (MICRO TOP PICKS), Vol. 26, No. 1, pages 10-20, January/February 2006. Submitted final version

Hyesoon Kim, Onur Mutlu, Jared Stark, and Yale N. Patt,
“Wish Branches: Enabling Adaptive and Aggressive Predicated Execution”
IEEE Micro, Special Issue: Micro’s Top Picks from Microarchitecture Conferences (MICRO TOP PICKS), Vol. 26, No. 1, pages 48-58, January/February 2006. Submitted final version

2005

Onur Mutlu, Hyesoon Kim, David N. Armstrong, and Yale N. Patt,
“An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors”
IEEE Transactions on Computers (TC), Vol. 54, No. 12, pages 1556-1571, December 2005.

Onur Mutlu, Hyesoon Kim, and Yale N. Patt,
“Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns”
Proceedings of the 38th International Symposium on Microarchitecture (MICRO), pages 233-244, Barcelona, Spain, November 2005. Slides (ppt) Slides (pdf)
One of the five papers nominated for the Best Paper Award by the Program Committee.
An extended version as HPS Technical Report, TR-HPS-2006-004, University of Texas at Austin, April 2006.

Hyesoon Kim, Onur Mutlu, Jared Stark, and Yale N. Patt,
“Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution”
Proceedings of the 38th International Symposium on Microarchitecture (MICRO), pages 43-54, Barcelona, Spain, November 2005. Slides (ppt)
One of the 13 computer architecture papers of 2005 selected as Top Picks by IEEE Micro.

Onur Mutlu, Hyesoon Kim, David N. Armstrong, and Yale N. Patt,
“Using the First-Level Caches as Filters to Reduce the Pollution Caused by Speculative Memory References”
International Journal of Parallel Programming (IJPP), Vol. 33, No. 5, pages 529-559, October 2005.

Onur Mutlu, Hyesoon Kim, and Yale N. Patt,
“Techniques for Efficient Processing in Runahead Execution Engines”
Proceedings of the 32nd International Symposium on Computer Architecture (ISCA), pages 370-381, Madison, WI, June 2005. Slides (ppt) Slides (pdf)
One of the 13 computer architecture papers of 2005 selected as Top Picks by IEEE Micro.

Moinuddin K. Qureshi, Onur Mutlu, and Yale N. Patt,
“Microarchitecture-Based Introspection: A Technique for Transient-Fault Tolerance in Microprocessors”
Proceedings of the International Conference on Dependable Systems and Networks (DSN), pages 434-443, Yokohama, Japan, June 2005. Slides (pdf)

Onur Mutlu, Hyesoon Kim, Jared Stark, and Yale N. Patt,
“On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor”
IEEE Computer Architecture Letters (CAL), Vol. 4, January 2005.

2004

David N. Armstrong, Hyesoon Kim, Onur Mutlu, and Yale N. Patt,
“Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery”
Proceeedings of the 37th International Symposium on Microarchitecture (MICRO), pages 119-128, Portland, OR, December 2004. Slides (pdf) Slides (ppt)
An extended version as HPS Technical Report, TR-HPS-2004-002, University of Texas at Austin, June 2004.

Onur Mutlu, Hyesoon Kim, David N. Armstrong, and Yale N. Patt,
“Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance”
Proceeedings of the 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), pages 2-9, Foz Do Iguacu, PR, Brazil, October 2004. Slides (pdf)

Onur Mutlu, Hyesoon Kim, David N. Armstrong, and Yale N. Patt,
“Understanding the Effects of Wrong-Path Memory References on Processor Performance”
Proceedings of the 3rd Workshop on Memory Performance Issues (WMPI), pages 56-64, Munchen, Germany, June 2004. Slides (pdf)
An extended version as HPS Technical Report, TR-HPS-2005-001, University of Texas at Austin, January 2005.

2003

Onur Mutlu, Jared Stark, Chris Wilkerson, and Yale N. Patt,
“Runahead Execution: An Effective Alternative to Large Instruction Windows”
IEEE Micro, Special Issue: Micro’s Top Picks from Microarchitecture Conferences (MICRO TOP PICKS), Vol. 23, No. 6, pages 20-25, November/December 2003.

Onur Mutlu, Jared Stark, Chris Wilkerson, and Yale N. Patt,
“Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-order Processors”
Proceedings of the 9th International Symposium on High-Performance Computer Architecture (HPCA), pages 129-140, Anaheim, CA, February 2003. Slides (pdf)
One of the 15 computer architecture papers of 2003 selected as Top Picks by IEEE Micro.

Dissertation

Onur Mutlu,
“Efficient Runahead Execution Processors”
Ph.D. Dissertation, HPS Technical Report, TR-HPS-2006-007, July 2006. Slides (ppt)
Nominated for the ACM Doctoral Dissertation Award by the University of Texas at Austin.

Significant Technical Reports (Unpublished)

HanBin Yoon, Naveen Muralimanohar, Justin Meza, Onur Mutlu, and Norman P. Jouppi,
“Techniques for Data Mapping and Buffering to Exploit Asymmetry in Multi-Level Cell (Phase Change) Memory”
SAFARI Technical Report, TR-SAFARI-2013-002, Carnegie Mellon University, May 2013.

Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry,
“RowClone: Fast and Efficient In-DRAM Copy and Initialization of Bulk Data”
CMU Computer Science Technical Report, CMU-CS-13-108, Carnegie Mellon University, April 2013.

Chris Fallin, Xiangyao Yu, Kevin Chang, Rachata Ausavarungnirun, Greg Nazario, Reetuparna Das, and Onur Mutlu,
“HiRD: A Low-Complexity, Energy-Efficient Hierarchical Ring Interconnect”
SAFARI Technical Report, TR-SAFARI-2012-004, Carnegie Mellon University, December 2012.

Justin Meza, Jing Li, and Onur Mutlu,
“Evaluating Row Buffer Locality in Future Non-Volatile Main Memories”
SAFARI Technical Report, TR-SAFARI-2012-002, Carnegie Mellon University, December 2012.

Gennady Pekhimenko, Vivek Seshadri, Yoongu Kim, Hongyi Xin, Onur Mutlu, Michael A. Kozuch, Phillip B. Gibbons, and Todd C. Mowry,
“Linearly Compressed Pages: A Main Memory Compression Framework with Low Complexity and Low Latency”
SAFARI Technical Report, TR-SAFARI-2012-005, Carnegie Mellon University, September 2012.

Chris Fallin, Xiangyao Yu, Greg Nazario, and Onur Mutlu,
“A High-Performance Hierarchical Ring On-Chip Interconnect with Low-Cost Routers”
SAFARI Technical Report, TR-SAFARI-2011-007, Carnegie Mellon University, September 2011.

Chris Craik and Onur Mutlu,
“Investigating the Viability of Bufferless NoCs in Modern Chip Multi-Processor Systems”
SAFARI Technical Report, TR-SAFARI-2011-004, Carnegie Mellon University, August 2011.

Chang Joo Lee, Eiman Ebrahimi, Veynu Narasiman, Onur Mutlu, and Yale N. Patt,
“DRAM-Aware Last-Level Cache Replacement”
HPS Technical Report, TR-HPS-2010-007, December 2010.

Chang Joo Lee, Veynu Narasiman, Eiman Ebrahimi, Onur Mutlu, and Yale N. Patt,
“DRAM-Aware Last-Level Cache Writeback: Reducing Write-Caused Interference in Memory Systems”
HPS Technical Report, TR-HPS-2010-002, April 2010.

Other Technical Reports (Extended Versions)

M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, and Yale N. Patt,
“An Asymmetric Multi-core Architecture for Accelerating Critical Sections”
HPS Technical Report, TR-HPS-2008-003, September 2008.

Chang Joo Lee, Onur Mutlu, Veynu Narasiman, and Yale N. Patt,
“Prefetch-Aware DRAM Controllers”
HPS Technical Report, TR-HPS-2008-002, September 2008.

Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, and Robert S. Cohn,
“VPC Prediction: Reducing the Cost of Indirect Branches via Hardware-Based Dynamic Devirtualization”
HPS Technical Report, TR-HPS-2007-002, March 2007.

Thomas Moscibroda and Onur Mutlu,
“Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems”
Microsoft Research Technical Report, MSR-TR-2007-15, February 2007.

Chang Joo Lee, Hyesoon Kim, Onur Mutlu, and Yale N. Patt,
“A Performance-Aware Speculation Control Technique Using Wrong Path Usefulness Prediction”
HPS Technical Report, TR-HPS-2006-010, December 2006.

Hyesoon Kim, José A. Joao, Onur Mutlu, and Yale N. Patt,
“Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths”
HPS Technical Report, TR-HPS-2006-008, September 2006.

Santhosh Srinath, Onur Mutlu, Hyesoon Kim, and Yale N. Patt,
“Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers”
HPS Technical Report, TR-HPS-2006-006, May 2006.

Hyesoon Kim, José A. Joao, Onur Mutlu, and Yale N. Patt,
“Compiler-Assisted Dynamic Predicated Execution of Complex Control-Flow Structures”
HPS Technical Report, TR-HPS-2006-005, April 2006.

Onur Mutlu, Hyesoon Kim, and Yale N. Patt,
“Address-Value Delta (AVD) Prediction: A Hardware Technique for Efficiently Parallelizing Dependent Cache Misses”
HPS Technical Report, TR-HPS-2006-004, April 2006.

Moinuddin K. Qureshi, Daniel N. Lynch, Onur Mutlu, and Yale N. Patt,
“A Case for MLP-Aware Cache Replacement”
HPS Technical Report, TR-HPS-2006-003, University of Texas at Austin, February 2006.

Hyesoon Kim, M. Aater Suleman, Onur Mutlu, and Yale N. Patt,
“2D-Profiling: Detecting Input-Dependent Branches with a Single Input Data Set”
HPS Technical Report, TR-HPS-2006-001, University of Texas at Austin, January 2006.

Hyesoon Kim, Onur Mutlu, Jared Stark, David N. Armstrong, and Yale N. Patt,
“Wish Branch: A New Control Flow Instruction Combining Conditional Branching and Predicated Execution”
HPS Technical Report, TR-HPS-2005-002, University of Texas at Austin, February 2005.

Onur Mutlu, Hyesoon Kim, David N. Armstrong, and Yale N. Patt,
“An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors”
HPS Technical Report, TR-HPS-2005-001, University of Texas at Austin, January 2005.

Moinuddin K. Qureshi, Onur Mutlu, and Yale N. Patt,
“Microarchitecture-Based Introspection: A Technique for Transient-Fault Tolerance in Microprocessors”
HPS Technical Report, TR-HPS-2004-004, University of Texas at Austin, December 2004.

David N. Armstrong, Hyesoon Kim, Onur Mutlu, and Yale N. Patt,
“Wrong Path Events: Exploiting Illegal and Unusual Program Behavior for Early Misprediction Recovery”
HPS Technical Report, TR-HPS-2004-002, University of Texas at Austin, June 2004.

Project Reports

Hyesoon Kim, Onur Mutlu, and Santhosh Srinath,
“The Design of a 7-stage Pipelined 143 MHz Microprocessor Implementing a Subset of the x86 ISA”
EE 382N (Microarchitecture) Project Report, University of Texas at Austin, May 2002.

Onur Mutlu,
“An Overview of Image Watermarking Algorithms”
EE 371R (Digital Image and Video Processing) Project Report, University of Texas at Austin, December 2001.

Onur Mutlu and Chandresh Jain,
“Effectiveness of TCP for Video Transport”
CS 384V (Multimedia Systems) Project Report, University of Texas at Austin, November 2001.

Onur Mutlu and Aditya Bhattacharya,
“Alpha 21264 Microarchitecture”
EE 382N (Superscalar Microprocessor Architecture) Slides, University of Texas at Austin, November 2001.

Chandresh Jain and Onur Mutlu,
“Design of a Buffer Management Scheme for Video Servers”
CS 384V (Multimedia Systems) Project Report, University of Texas at Austin, October 2001.

Onur Mutlu,
“Memory Dependence Prediction and Access Ordering for Memory Disambiguation and Renaming”
EE 382N (Superscalar Microprocessor Architecture) Literature Survey, University of Texas at Austin, October 2001.

Yousuf Ahmed, Chandresh Jain, and Onur Mutlu,
“A Global Predicate Detector for Distributed Computation”
EE 382N (Distributed Systems) Project Report, Winner of Best Project Award, University of Texas at Austin, December 2000.

Onur Mutlu,
“Effects of the Type of Loud Background Music on Speed of Processing”
PSYCH 341 (Cognitive Psychology Laboratory) Project Report, University of Michigan, Ann Arbor, August 2000.

Nai Ka Chung, Tufan C. Karalar, Pak Hei M. Leung, Onur Mutlu, and Cheongyuen Tsang,
“A Low-Power Low-Cost 16-Bit RISC Microcontroller for Security Systems”
EECS 427 (VLSI Design) Project Report, University of Michigan, Ann Arbor, April 2000. Chip Image

Onur Mutlu,
“A Grammatical Sketch of Even”
LING 112 (Languages of the World) Project Report, University of Michigan, Ann Arbor, December 1999.