Join us for our upcoming SAFARI Live Seminar, co-organized by the ETH Future Computing Laboratory (EFCL).
Date: Friday, May 12 2023, 11:00 Zurich time (CEST)
Where: HG F 26.1 & Livestream on YouTube (Link)
Speaker: Lizy Kurian John, University of Texas at Austin
Title: Hardware for ML and ML for Hardware
The emerging machine learning applications put exploding demands on hardware systems, and it is important to deliver high throughput, strong security, low latency and low energy consumption, in order to sustain the thriving development of cognitive systems and applications. Designing efficient circuits and systems to enable, support, and harness the power of machine intelligence is important to keep the present momentum of intelligent systems. In this talk, I will describe some of our research on providing efficient hardware infrastructure for ML.
In addition to designing systems for ML, we also conduct research on using ML in designing and evaluating systems. In this talk I’ll describe a few examples on using ML for pre-silicon performance evaluation during design of computer systems.
Lizy Kurian John is Truchard Foundation Chair in Engineering at the University of Texas at Austin. She received her Ph.D in Computer Engineering from the Pennsylvania State University. Her research interests include workload characterization, performance evaluation, memory systems, reconfigurable architectures, and high performance architectures for emerging workloads. She is recipient of many awards including The Pennsylvania State University Outstanding Engineering Alumnus 2011, the NSF CAREER award, UT Austin Engineering Foundation Faculty Award, Halliburton, Brown and Root Engineering Foundation Young Faculty Award 2001, University of Texas Alumni Association (Texas Exes) Teaching Award 2004, etc. She has coauthored books on Digital Systems Design using VHDL (Cengage Publishers, 2007, 2017), a book on Digital Systems Design using Verilog (Cengage Publishers, 2014) and has edited 4 books including a book on Computer Performance Evaluation and Benchmarking. She is currently the Editor-in-Chief of IEEE Micro. She holds 16 US patents and is an IEEE Fellow (Class of 2009), ACM Fellow and Fellow of the National Academy of Inventors (NAI).