Join us for our SAFARI Live Seminar with Rahul Bera:
Monday, December 20 at 5:00 pm Zurich time (CET)
Rahul Bera, SAFARI Research Group, ETH Zurich
Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning
Livestream on YouTube Link
Abstract:
Past research has proposed numerous hardware prefetching techniques, most of which rely on exploiting one specific type of program context information (e.g., program counter) to predict future memory accesses. These techniques either completely neglect a prefetcher’s undesirable effects (e.g., memory bandwidth usage) on the overall system, or incorporate system-level feedback as an afterthought to a system-unaware prefetch algorithm. In this talk, we show that prior prefetchers often lose their performance benefit over a wide range of workloads and system configurations due to their inherent inability to take multiple different types of program context and system-level feedback information into account while prefetching. We make a case for designing a holistic prefetch algorithm that learns to prefetch using multiple different types of program context and system-level feedback information inherent to its design. To this end, we introduce a new prefetcher called Pythia (MICRO’21). Pythia formulates the prefetcher as a reinforcement learning (RL) agent, which takes adaptive prefetch decisions by autonomously learning using both multiple program features and system-level feedback information inherent to its design. We provide a low-overhead, practical implementation of Pythia’s RL-based algorithm in hardware. By extensive evaluation, we show that Pythia outperforms prior state-of-the-art prefetchers over a wide variety of workloads in a wide range of system configurations.
Pythia source code is officially artifact evaluated and freely available.
Arxiv: https://arxiv.org/pdf/2109.12021.pdf
GitHub: https://github.com/CMU-SAFARI/Pythia
Speaker Bio:
Rahul Bera is a doctoral student at ETH Zürich working with Prof. Onur Mutlu. His research interests include memory hierarchy design and optimization, especially using data-driven learning-based principles. Before joining the Ph.D. program, he worked with Intel Processor Architecture Research Lab, India on memory hierarchy design for traditional and machine-learning-based workloads. He got his master’s from Indian Institute of Technology, Kanpur. To know more about his research, please visit http://bit.ly/rahulbera
Related Links:
Rahul Bera, Konstantinos Kanellopoulos, Anant Nori, Taha Shahroodi, Sreenivas Subramoney, and Onur Mutlu
“Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning”, Proceedings of the 54th International Symposium on Microarchitecture (MICRO), Virtual, October 2021.
[Slides (pptx) (pdf)]
[Short Talk Slides (pptx) (pdf)]
[Lightning Talk Slides (pptx) (pdf)]
[Talk Video (20 minutes)]
[Lightning Talk Video (1.5 minutes)]
[Pythia Source Code (Officially Artifact Evaluated with All Badges)]
[arXiv version]
Rahul Bera, Anant V. Nori, Onur Mutlu, and Sreenivas Subramoney, “DSPatch: Dual Spatial Pattern Prefetcher”, Proceedings of the 52nd International Symposium on Microarchitecture (MICRO), Columbus, OH, USA, October 2019.
[Slides (pptx) (pdf)]
[Lightning Talk Slides (pptx) (pdf)]
[Poster (pptx) (pdf)]
[Lightning Talk Video (90 seconds)]